include/configs/vpac270.h

   1 /*
   2  * Voipac PXA270 configuration file
   3  *
   4  * Copyright (C) 2010 Marek Vasut <marek.vasut@gmail.com>
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License as
   8  * published by the Free Software Foundation; either version 2 of
   9  * the License, or (at your option) any later version.
  10  *
  11  * This program is distributed in the hope that it will be useful,
  12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14  * GNU General Public License for more details.
  15  *
  16  * You should have received a copy of the GNU General Public License
  17  * along with this program; if not, write to the Free Software
  18  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  19  * MA 02111-1307 USA
  20  */
  21
  22 #ifndef __CONFIG_H
  23 #define __CONFIG_H
  24
  25 /*
  26  * High Level Board Configuration Options
  27  */
  28 #define CONFIG_PXA27X           1       /* Marvell PXA270 CPU */
  29 #define CONFIG_VPAC270          1       /* Voipac PXA270 board */
  30 #define CONFIG_SYS_TEXT_BASE    0x0
  31
  32 /*
  33  * Environment settings
  34  */
  35 #define CONFIG_ENV_OVERWRITE
  36 #define CONFIG_SYS_MALLOC_LEN           (128*1024)
  37 #define CONFIG_SYS_GBL_DATA_SIZE        128
  38 #define CONFIG_ARCH_CPU_INIT
  39 #define CONFIG_BOOTCOMMAND                                              \
  40         "if mmc init && fatload mmc 0 0xa4000000 uImage; then "         \
  41                 "bootm 0xa4000000; "                                    \
  42         "fi; "                                                          \
  43         "if usb reset && fatload usb 0 0xa4000000 uImage; then "        \
  44                 "bootm 0xa4000000; "                                    \
  45         "fi; "                                                          \
  46         "if ide reset && fatload ide 0 0xa4000000 uImage; then "        \
  47                 "bootm 0xa4000000; "                                    \
  48         "fi; "                                                          \
  49         "bootm 0x60000;"
  50 #define CONFIG_BOOTARGS                 "console=tty0 console=ttyS0,115200"
  51 #define CONFIG_TIMESTAMP
  52 #define CONFIG_BOOTDELAY                2       /* Autoboot delay */
  53 #define CONFIG_CMDLINE_TAG
  54 #define CONFIG_SETUP_MEMORY_TAGS
  55 #define CONFIG_SYS_TEXT_BASE            0x0
  56 #define CONFIG_LZMA                     /* LZMA compression support */
  57
  58 /*
  59  * Serial Console Configuration
  60  */
  61 #define CONFIG_PXA_SERIAL
  62 #define CONFIG_FFUART                   1
  63 #define CONFIG_BAUDRATE                 115200
  64 #define CONFIG_SYS_BAUDRATE_TABLE       { 9600, 19200, 38400, 57600, 115200 }
  65
  66 /*
  67  * Bootloader Components Configuration
  68  */
  69 #include <config_cmd_default.h>
  70
  71 #define CONFIG_CMD_NET
  72 #define CONFIG_CMD_ENV
  73 #undef  CONFIG_CMD_IMLS
  74 #define CONFIG_CMD_MMC
  75 #define CONFIG_CMD_USB
  76 #undef  CONFIG_LCD
  77 #define CONFIG_CMD_IDE
  78
  79 #ifdef  CONFIG_ONENAND
  80 #undef  CONFIG_CMD_FLASH
  81 #define CONFIG_CMD_ONENAND
  82 #else
  83 #define CONFIG_CMD_FLASH
  84 #undef  CONFIG_CMD_ONENAND
  85 #endif
  86
  87 /*
  88  * Networking Configuration
  89  *  chip on the Voipac PXA270 board
  90  */
  91 #ifdef  CONFIG_CMD_NET
  92 #define CONFIG_CMD_PING
  93 #define CONFIG_CMD_DHCP
  94
  95 #define CONFIG_NET_MULTI                1
  96 #define CONFIG_DRIVER_DM9000            1
  97 #define CONFIG_DM9000_BASE              0x08000300      /* CS2 */
  98 #define DM9000_IO                       (CONFIG_DM9000_BASE)
  99 #define DM9000_DATA                     (CONFIG_DM9000_BASE + 4)
 100 #define CONFIG_NET_RETRY_COUNT          10
 101
 102 #define CONFIG_BOOTP_BOOTFILESIZE
 103 #define CONFIG_BOOTP_BOOTPATH
 104 #define CONFIG_BOOTP_GATEWAY
 105 #define CONFIG_BOOTP_HOSTNAME
 106 #endif
 107
 108 /*
 109  * MMC Card Configuration
 110  */
 111 #ifdef  CONFIG_CMD_MMC
 112 #define CONFIG_MMC
 113 #define CONFIG_PXA_MMC
 114 #define CONFIG_SYS_MMC_BASE             0xF0000000
 115 #define CONFIG_CMD_FAT
 116 #define CONFIG_CMD_EXT2
 117 #define CONFIG_DOS_PARTITION
 118 #endif
 119
 120 /*
 121  * KGDB
 122  */
 123 #ifdef  CONFIG_CMD_KGDB
 124 #define CONFIG_KGDB_BAUDRATE            230400  /* kgdb serial port speed */
 125 #define CONFIG_KGDB_SER_INDEX           2       /* which serial port to use */
 126 #endif
 127
 128 /*
 129  * HUSH Shell Configuration
 130  */
 131 #define CONFIG_SYS_HUSH_PARSER          1
 132 #define CONFIG_SYS_PROMPT_HUSH_PS2      "> "
 133
 134 #define CONFIG_SYS_LONGHELP
 135 #ifdef  CONFIG_SYS_HUSH_PARSER
 136 #define CONFIG_SYS_PROMPT               "$ "
 137 #else
 138 #define CONFIG_SYS_PROMPT               "=> "
 139 #endif
 140 #define CONFIG_SYS_CBSIZE               256
 141 #define CONFIG_SYS_PBSIZE               \
 142         (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
 143 #define CONFIG_SYS_MAXARGS              16
 144 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE
 145 #define CONFIG_SYS_DEVICE_NULLDEV       1
 146
 147 /*
 148  * Clock Configuration
 149  */
 150 #define CONFIG_SYS_HZ                   1000            /* Timer @ 3250000 Hz */
 151 #define CONFIG_SYS_CPUSPEED             0x190           /* 312MHz */
 152
 153 /*
 154  * Stack sizes
 155  */
 156 #define CONFIG_STACKSIZE                (128*1024)      /* regular stack */
 157 #ifdef  CONFIG_USE_IRQ
 158 #define CONFIG_STACKSIZE_IRQ            (4*1024)        /* IRQ stack */
 159 #define CONFIG_STACKSIZE_FIQ            (4*1024)        /* FIQ stack */
 160 #endif
 161
 162 /*
 163  * DRAM Map
 164  */
 165 #define CONFIG_NR_DRAM_BANKS            2               /* 2 banks of DRAM */
 166 #define PHYS_SDRAM_1                    0xa0000000      /* SDRAM Bank #1 */
 167 #define PHYS_SDRAM_1_SIZE               0x08000000      /* 128 MB */
 168
 169 #ifdef  CONFIG_RAM_256M
 170 #define PHYS_SDRAM_2                    0x80000000      /* SDRAM Bank #2 */
 171 #define PHYS_SDRAM_2_SIZE               0x08000000      /* 128 MB */
 172 #endif
 173
 174 #define CONFIG_SYS_DRAM_BASE            0xa0000000      /* CS0 */
 175 #ifdef  CONFIG_RAM_256M
 176 #define CONFIG_SYS_DRAM_SIZE            0x10000000      /* 256 MB DRAM */
 177 #else
 178 #define CONFIG_SYS_DRAM_SIZE            0x08000000      /* 128 MB DRAM */
 179 #endif
 180
 181 #define CONFIG_SYS_MEMTEST_START        0xa0400000      /* memtest works on */
 182 #define CONFIG_SYS_MEMTEST_END          0xa0800000      /* 4 ... 8 MB in DRAM */
 183
 184 #define CONFIG_SYS_LOAD_ADDR            PHYS_SDRAM_1
 185 #define CONFIG_SYS_IPL_LOAD_ADDR        (0x5c000000)
 186 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
 187 #define CONFIG_SYS_INIT_SP_ADDR         \
 188         (PHYS_SDRAM_1 + CONFIG_SYS_GBL_DATA_SIZE + 2048)
 189
 190 /*
 191  * NOR FLASH
 192  */
 193 #define CONFIG_SYS_MONITOR_BASE         0x0
 194 #define CONFIG_SYS_MONITOR_LEN          0x40000
 195 #define CONFIG_ENV_ADDR                 \
 196                         (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN)
 197 #define CONFIG_ENV_SIZE                 0x4000
 198
 199 #if     defined(CONFIG_CMD_FLASH)       /* NOR */
 200 #define PHYS_FLASH_1                    0x00000000      /* Flash Bank #1 */
 201
 202 #ifdef  CONFIG_RAM_256M
 203 #define PHYS_FLASH_2                    0x02000000      /* Flash Bank #2 */
 204 #endif
 205
 206 #define CONFIG_SYS_FLASH_CFI
 207 #define CONFIG_FLASH_CFI_DRIVER         1
 208
 209 #define CONFIG_SYS_MAX_FLASH_SECT       (4 + 255)
 210 #ifdef  CONFIG_RAM_256M
 211 #define CONFIG_SYS_MAX_FLASH_BANKS      2
 212 #define CONFIG_SYS_FLASH_BANKS_LIST     { PHYS_FLASH_1, PHYS_FLASH_2 }
 213 #else
 214 #define CONFIG_SYS_MAX_FLASH_BANKS      1
 215 #define CONFIG_SYS_FLASH_BASE           PHYS_FLASH_1
 216 #endif
 217
 218 #define CONFIG_SYS_FLASH_ERASE_TOUT     (25*CONFIG_SYS_HZ)
 219 #define CONFIG_SYS_FLASH_WRITE_TOUT     (25*CONFIG_SYS_HZ)
 220
 221 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE       1
 222 #define CONFIG_SYS_FLASH_PROTECTION             1
 223
 224 #define CONFIG_ENV_IS_IN_FLASH          1
 225
 226 /*
 227  * The first four sectors of the NOR flash are 0x8000 bytes big, the rest of the
 228  * flash consists of 0x20000 bytes big sectors.
 229  */
 230 #if     (CONFIG_ENV_ADDR <= 0x18000)
 231 #define CONFIG_ENV_SECT_SIZE            0x8000
 232 #else
 233 #define CONFIG_ENV_SECT_SIZE            0x20000
 234 #endif
 235
 236 #elif   defined(CONFIG_CMD_ONENAND)     /* OneNAND */
 237 #define CONFIG_SYS_NO_FLASH
 238 #define CONFIG_SYS_ONENAND_BASE         0x00000000
 239
 240 #define CONFIG_ENV_IS_IN_ONENAND        1
 241 #define CONFIG_ENV_SECT_SIZE            0x20000
 242
 243 #else   /* No flash */
 244 #define CONFIG_SYS_NO_FLASH
 245 #define CONFIG_SYS_ENV_IS_NOWHERE
 246 #endif
 247
 248 /*
 249  * IDE
 250  */
 251 #ifdef  CONFIG_CMD_IDE
 252 #define CONFIG_LBA48
 253 #undef  CONFIG_IDE_LED
 254 #undef  CONFIG_IDE_RESET
 255
 256 #define __io
 257
 258 #define CONFIG_SYS_IDE_MAXBUS           1
 259 #define CONFIG_SYS_IDE_MAXDEVICE        1
 260
 261 #define CONFIG_SYS_ATA_BASE_ADDR        0x0c000000
 262 #define CONFIG_SYS_ATA_IDE0_OFFSET      0x0
 263
 264 #define CONFIG_SYS_ATA_DATA_OFFSET      0x120
 265 #define CONFIG_SYS_ATA_REG_OFFSET       0x120
 266 #define CONFIG_SYS_ATA_ALT_OFFSET       0x120
 267
 268 #define CONFIG_SYS_ATA_STRIDE           2
 269 #endif
 270
 271 /*
 272  * GPIO settings
 273  */
 274 #define CONFIG_SYS_GPSR0_VAL    0x01308800
 275 #define CONFIG_SYS_GPSR1_VAL    0x00cf0000
 276 #define CONFIG_SYS_GPSR2_VAL    0x922ac000
 277 #define CONFIG_SYS_GPSR3_VAL    0x0161e800
 278
 279 #define CONFIG_SYS_GPCR0_VAL    0x00010000
 280 #define CONFIG_SYS_GPCR1_VAL    0x0
 281 #define CONFIG_SYS_GPCR2_VAL    0x0
 282 #define CONFIG_SYS_GPCR3_VAL    0x0
 283
 284 #define CONFIG_SYS_GPDR0_VAL    0xcbb18800
 285 #define CONFIG_SYS_GPDR1_VAL    0xfccfa981
 286 #define CONFIG_SYS_GPDR2_VAL    0x922affff
 287 #define CONFIG_SYS_GPDR3_VAL    0x0161e904
 288
 289 #define CONFIG_SYS_GAFR0_L_VAL  0x00100000
 290 #define CONFIG_SYS_GAFR0_U_VAL  0xa5da8510
 291 #define CONFIG_SYS_GAFR1_L_VAL  0x6992901a
 292 #define CONFIG_SYS_GAFR1_U_VAL  0xaaa5a0aa
 293 #define CONFIG_SYS_GAFR2_L_VAL  0xaaaaaaaa
 294 #define CONFIG_SYS_GAFR2_U_VAL  0x4109a401
 295 #define CONFIG_SYS_GAFR3_L_VAL  0x54010310
 296 #define CONFIG_SYS_GAFR3_U_VAL  0x00025401
 297
 298 #define CONFIG_SYS_PSSR_VAL     0x30
 299
 300 /*
 301  * Clock settings
 302  */
 303 #define CONFIG_SYS_CKEN         0x00500240
 304 #define CONFIG_SYS_CCCR         0x02000290
 305
 306 /*
 307  * Memory settings
 308  */
 309 #define CONFIG_SYS_MSC0_VAL     0x3ffc95fa
 310 #define CONFIG_SYS_MSC1_VAL     0x02ccf974
 311 #define CONFIG_SYS_MSC2_VAL     0x00000000
 312 #ifdef  CONFIG_RAM_256M
 313 #define CONFIG_SYS_MDCNFG_VAL   0x8ad30ad3
 314 #else
 315 #define CONFIG_SYS_MDCNFG_VAL   0x88000ad3
 316 #endif
 317 #define CONFIG_SYS_MDREFR_VAL   0x201fe01e
 318 #define CONFIG_SYS_MDMRS_VAL    0x00000000
 319 #define CONFIG_SYS_FLYCNFG_VAL  0x00000000
 320 #define CONFIG_SYS_SXCNFG_VAL   0x40044004
 321 #define CONFIG_SYS_MEM_BUF_IMP  0x0f
 322
 323 /*
 324  * PCMCIA and CF Interfaces
 325  */
 326 #define CONFIG_SYS_MECR_VAL     0x00000001
 327 #define CONFIG_SYS_MCMEM0_VAL   0x00014307
 328 #define CONFIG_SYS_MCMEM1_VAL   0x00014307
 329 #define CONFIG_SYS_MCATT0_VAL   0x0001c787
 330 #define CONFIG_SYS_MCATT1_VAL   0x0001c787
 331 #define CONFIG_SYS_MCIO0_VAL    0x0001430f
 332 #define CONFIG_SYS_MCIO1_VAL    0x0001430f
 333
 334 /*
 335  * LCD
 336  */
 337 #ifdef  CONFIG_LCD
 338 #define CONFIG_VOIPAC_LCD
 339 #endif
 340
 341 /*
 342  * USB
 343  */
 344 #ifdef  CONFIG_CMD_USB
 345 #define CONFIG_USB_OHCI_NEW
 346 #define CONFIG_SYS_USB_OHCI_CPU_INIT
 347 #define CONFIG_SYS_USB_OHCI_BOARD_INIT
 348 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS      2
 349 #define CONFIG_SYS_USB_OHCI_REGS_BASE   0x4C000000
 350 #define CONFIG_SYS_USB_OHCI_SLOT_NAME   "vpac270"
 351 #define CONFIG_USB_STORAGE
 352 #endif
 353
 354 #endif  /* __CONFIG_H */