2 * Voipac PXA270 configuration file
4 * Copyright (C) 2010 Marek Vasut <marek.vasut@gmail.com>
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License as
8 * published by the Free Software Foundation; either version 2 of
9 * the License, or (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
26 * High Level Board Configuration Options
28 #define CONFIG_CPU_PXA27X 1 /* Marvell PXA270 CPU */
29 #define CONFIG_VPAC270 1 /* Voipac PXA270 board */
30 #define CONFIG_SYS_TEXT_BASE 0xa0000000
34 #define CONFIG_SPL_ONENAND_SUPPORT
35 #define CONFIG_SPL_ONENAND_LOAD_ADDR 0x2000
36 #define CONFIG_SPL_ONENAND_LOAD_SIZE \
37 (512 * 1024 - CONFIG_SPL_ONENAND_LOAD_ADDR)
38 #define CONFIG_SPL_TEXT_BASE 0x5c000000
39 #define CONFIG_SPL_LDSCRIPT "board/vpac270/u-boot-spl.lds"
43 * Environment settings
45 #define CONFIG_ENV_OVERWRITE
46 #define CONFIG_SYS_MALLOC_LEN (128*1024)
47 #define CONFIG_ARCH_CPU_INIT
48 #define CONFIG_BOOTCOMMAND \
49 "if mmc init && fatload mmc 0 0xa4000000 uImage; then " \
50 "bootm 0xa4000000; " \
52 "if usb reset && fatload usb 0 0xa4000000 uImage; then " \
53 "bootm 0xa4000000; " \
55 "if ide reset && fatload ide 0 0xa4000000 uImage; then " \
56 "bootm 0xa4000000; " \
60 #define CONFIG_EXTRA_ENV_SETTINGS \
62 "onenand erase 0x0 0x80000 ; " \
63 "onenand write 0xa0000000 0x0 0x80000"
65 #define CONFIG_BOOTARGS "console=tty0 console=ttyS0,115200"
66 #define CONFIG_TIMESTAMP
67 #define CONFIG_BOOTDELAY 2 /* Autoboot delay */
68 #define CONFIG_CMDLINE_TAG
69 #define CONFIG_SETUP_MEMORY_TAGS
70 #define CONFIG_LZMA /* LZMA compression support */
71 #define CONFIG_OF_LIBFDT
74 * Serial Console Configuration
76 #define CONFIG_PXA_SERIAL
77 #define CONFIG_FFUART 1
78 #define CONFIG_BAUDRATE 115200
81 * Bootloader Components Configuration
83 #include <config_cmd_default.h>
85 #define CONFIG_CMD_NET
86 #define CONFIG_CMD_ENV
87 #undef CONFIG_CMD_IMLS
88 #define CONFIG_CMD_MMC
89 #define CONFIG_CMD_USB
91 #define CONFIG_CMD_IDE
94 #undef CONFIG_CMD_FLASH
95 #define CONFIG_CMD_ONENAND
97 #define CONFIG_CMD_FLASH
98 #undef CONFIG_CMD_ONENAND
102 * Networking Configuration
103 * chip on the Voipac PXA270 board
105 #ifdef CONFIG_CMD_NET
106 #define CONFIG_CMD_PING
107 #define CONFIG_CMD_DHCP
109 #define CONFIG_DRIVER_DM9000 1
110 #define CONFIG_DM9000_BASE 0x08000300 /* CS2 */
111 #define DM9000_IO (CONFIG_DM9000_BASE)
112 #define DM9000_DATA (CONFIG_DM9000_BASE + 4)
113 #define CONFIG_NET_RETRY_COUNT 10
115 #define CONFIG_BOOTP_BOOTFILESIZE
116 #define CONFIG_BOOTP_BOOTPATH
117 #define CONFIG_BOOTP_GATEWAY
118 #define CONFIG_BOOTP_HOSTNAME
122 * MMC Card Configuration
124 #ifdef CONFIG_CMD_MMC
126 #define CONFIG_GENERIC_MMC
127 #define CONFIG_PXA_MMC_GENERIC
128 #define CONFIG_SYS_MMC_BASE 0xF0000000
129 #define CONFIG_CMD_FAT
130 #define CONFIG_CMD_EXT2
131 #define CONFIG_DOS_PARTITION
137 #ifdef CONFIG_CMD_KGDB
138 #define CONFIG_KGDB_BAUDRATE 230400 /* kgdb serial port speed */
139 #define CONFIG_KGDB_SER_INDEX 2 /* which serial port to use */
143 * HUSH Shell Configuration
145 #define CONFIG_SYS_HUSH_PARSER 1
147 #define CONFIG_SYS_LONGHELP
148 #ifdef CONFIG_SYS_HUSH_PARSER
149 #define CONFIG_SYS_PROMPT "$ "
151 #define CONFIG_SYS_PROMPT "=> "
153 #define CONFIG_SYS_CBSIZE 256
154 #define CONFIG_SYS_PBSIZE \
155 (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
156 #define CONFIG_SYS_MAXARGS 16
157 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
158 #define CONFIG_SYS_DEVICE_NULLDEV 1
159 #define CONFIG_CMDLINE_EDITING 1
160 #define CONFIG_AUTO_COMPLETE 1
163 * Clock Configuration
165 #define CONFIG_SYS_HZ 1000 /* Timer @ 3250000 Hz */
166 #define CONFIG_SYS_CPUSPEED 0x190 /* 312MHz */
172 #define CONFIG_NR_DRAM_BANKS 2 /* 2 banks of DRAM */
173 #define PHYS_SDRAM_1 0xa0000000 /* SDRAM Bank #1 */
174 #define PHYS_SDRAM_1_SIZE 0x08000000 /* 128 MB */
176 #ifdef CONFIG_RAM_256M
177 #define PHYS_SDRAM_2 0x80000000 /* SDRAM Bank #2 */
178 #define PHYS_SDRAM_2_SIZE 0x08000000 /* 128 MB */
181 #define CONFIG_SYS_DRAM_BASE 0xa0000000 /* CS0 */
182 #ifdef CONFIG_RAM_256M
183 #define CONFIG_SYS_DRAM_SIZE 0x10000000 /* 256 MB DRAM */
185 #define CONFIG_SYS_DRAM_SIZE 0x08000000 /* 128 MB DRAM */
188 #define CONFIG_SYS_MEMTEST_START 0xa0400000 /* memtest works on */
189 #define CONFIG_SYS_MEMTEST_END 0xa0800000 /* 4 ... 8 MB in DRAM */
191 #define CONFIG_SYS_LOAD_ADDR PHYS_SDRAM_1
192 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
193 #define CONFIG_SYS_INIT_SP_ADDR 0x5c010000
198 #define CONFIG_SYS_MONITOR_BASE 0x0
199 #define CONFIG_SYS_MONITOR_LEN 0x80000
200 #define CONFIG_ENV_ADDR \
201 (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN)
202 #define CONFIG_ENV_SIZE 0x20000
203 #define CONFIG_ENV_SECT_SIZE 0x20000
205 #if defined(CONFIG_CMD_FLASH) /* NOR */
206 #define PHYS_FLASH_1 0x00000000 /* Flash Bank #1 */
208 #ifdef CONFIG_RAM_256M
209 #define PHYS_FLASH_2 0x02000000 /* Flash Bank #2 */
212 #define CONFIG_SYS_FLASH_CFI
213 #define CONFIG_FLASH_CFI_DRIVER 1
215 #define CONFIG_SYS_MAX_FLASH_SECT (4 + 255)
216 #ifdef CONFIG_RAM_256M
217 #define CONFIG_SYS_MAX_FLASH_BANKS 2
218 #define CONFIG_SYS_FLASH_BANKS_LIST { PHYS_FLASH_1, PHYS_FLASH_2 }
220 #define CONFIG_SYS_MAX_FLASH_BANKS 1
221 #define CONFIG_SYS_FLASH_BASE PHYS_FLASH_1
224 #define CONFIG_SYS_FLASH_ERASE_TOUT (25*CONFIG_SYS_HZ)
225 #define CONFIG_SYS_FLASH_WRITE_TOUT (25*CONFIG_SYS_HZ)
227 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE 1
228 #define CONFIG_SYS_FLASH_PROTECTION 1
230 #define CONFIG_ENV_IS_IN_FLASH 1
232 #elif defined(CONFIG_CMD_ONENAND) /* OneNAND */
233 #define CONFIG_SYS_NO_FLASH
234 #define CONFIG_SYS_ONENAND_BASE 0x00000000
236 #define CONFIG_ENV_IS_IN_ONENAND 1
239 #define CONFIG_SYS_NO_FLASH
240 #define CONFIG_SYS_ENV_IS_NOWHERE
246 #ifdef CONFIG_CMD_IDE
248 #undef CONFIG_IDE_LED
249 #undef CONFIG_IDE_RESET
253 #define CONFIG_SYS_IDE_MAXBUS 1
254 #define CONFIG_SYS_IDE_MAXDEVICE 1
256 #define CONFIG_SYS_ATA_BASE_ADDR 0x0c000000
257 #define CONFIG_SYS_ATA_IDE0_OFFSET 0x0
259 #define CONFIG_SYS_ATA_DATA_OFFSET 0x120
260 #define CONFIG_SYS_ATA_REG_OFFSET 0x120
261 #define CONFIG_SYS_ATA_ALT_OFFSET 0x120
263 #define CONFIG_SYS_ATA_STRIDE 2
269 #define CONFIG_SYS_GPSR0_VAL 0x01308800
270 #define CONFIG_SYS_GPSR1_VAL 0x00cf0000
271 #define CONFIG_SYS_GPSR2_VAL 0x922ac000
272 #define CONFIG_SYS_GPSR3_VAL 0x0161e800
274 #define CONFIG_SYS_GPCR0_VAL 0x00010000
275 #define CONFIG_SYS_GPCR1_VAL 0x0
276 #define CONFIG_SYS_GPCR2_VAL 0x0
277 #define CONFIG_SYS_GPCR3_VAL 0x0
279 #define CONFIG_SYS_GPDR0_VAL 0xcbb18800
280 #define CONFIG_SYS_GPDR1_VAL 0xfccfa981
281 #define CONFIG_SYS_GPDR2_VAL 0x922affff
282 #define CONFIG_SYS_GPDR3_VAL 0x0161e904
284 #define CONFIG_SYS_GAFR0_L_VAL 0x00100000
285 #define CONFIG_SYS_GAFR0_U_VAL 0xa5da8510
286 #define CONFIG_SYS_GAFR1_L_VAL 0x6992901a
287 #define CONFIG_SYS_GAFR1_U_VAL 0xaaa5a0aa
288 #define CONFIG_SYS_GAFR2_L_VAL 0xaaaaaaaa
289 #define CONFIG_SYS_GAFR2_U_VAL 0x4109a401
290 #define CONFIG_SYS_GAFR3_L_VAL 0x54010310
291 #define CONFIG_SYS_GAFR3_U_VAL 0x00025401
293 #define CONFIG_SYS_PSSR_VAL 0x30
298 #define CONFIG_SYS_CKEN 0x00500240
299 #define CONFIG_SYS_CCCR 0x02000290
304 #define CONFIG_SYS_MSC0_VAL 0x3ffc95fa
305 #define CONFIG_SYS_MSC1_VAL 0x02ccf974
306 #define CONFIG_SYS_MSC2_VAL 0x00000000
307 #ifdef CONFIG_RAM_256M
308 #define CONFIG_SYS_MDCNFG_VAL 0x8ad30ad3
310 #define CONFIG_SYS_MDCNFG_VAL 0x88000ad3
312 #define CONFIG_SYS_MDREFR_VAL 0x201fe01e
313 #define CONFIG_SYS_MDMRS_VAL 0x00000000
314 #define CONFIG_SYS_FLYCNFG_VAL 0x00000000
315 #define CONFIG_SYS_SXCNFG_VAL 0x40044004
316 #define CONFIG_SYS_MEM_BUF_IMP 0x0f
319 * PCMCIA and CF Interfaces
321 #define CONFIG_SYS_MECR_VAL 0x00000001
322 #define CONFIG_SYS_MCMEM0_VAL 0x00014307
323 #define CONFIG_SYS_MCMEM1_VAL 0x00014307
324 #define CONFIG_SYS_MCATT0_VAL 0x0001c787
325 #define CONFIG_SYS_MCATT1_VAL 0x0001c787
326 #define CONFIG_SYS_MCIO0_VAL 0x0001430f
327 #define CONFIG_SYS_MCIO1_VAL 0x0001430f
333 #define CONFIG_VOIPAC_LCD
339 #ifdef CONFIG_CMD_USB
340 #define CONFIG_USB_OHCI_NEW
341 #define CONFIG_SYS_USB_OHCI_CPU_INIT
342 #define CONFIG_SYS_USB_OHCI_BOARD_INIT
343 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 2
344 #define CONFIG_SYS_USB_OHCI_REGS_BASE 0x4C000000
345 #define CONFIG_SYS_USB_OHCI_SLOT_NAME "vpac270"
346 #define CONFIG_USB_STORAGE
349 #endif /* __CONFIG_H */