41f8a6b01602ce284a44ed0a67e94b2fec315806
[platform/kernel/u-boot.git] / include / configs / vpac270.h
1 /*
2  * Voipac PXA270 configuration file
3  *
4  * Copyright (C) 2010 Marek Vasut <marek.vasut@gmail.com>
5  *
6  * This program is free software; you can redistribute it and/or
7  * modify it under the terms of the GNU General Public License as
8  * published by the Free Software Foundation; either version 2 of
9  * the License, or (at your option) any later version.
10  *
11  * This program is distributed in the hope that it will be useful,
12  * but WITHOUT ANY WARRANTY; without even the implied warranty of
13  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14  * GNU General Public License for more details.
15  *
16  * You should have received a copy of the GNU General Public License
17  * along with this program; if not, write to the Free Software
18  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
19  * MA 02111-1307 USA
20  */
21
22 #ifndef __CONFIG_H
23 #define __CONFIG_H
24
25 /*
26  * High Level Board Configuration Options
27  */
28 #define CONFIG_PXA27X           1       /* Marvell PXA270 CPU */
29 #define CONFIG_VPAC270          1       /* Voipac PXA270 board */
30 #define CONFIG_SYS_TEXT_BASE    0xa0000000
31
32 #ifdef  CONFIG_ONENAND
33 #define CONFIG_SPL
34 #define CONFIG_SPL_ONENAND_SUPPORT
35 #define CONFIG_SPL_ONENAND_LOAD_ADDR    0x2000
36 #define CONFIG_SPL_ONENAND_LOAD_SIZE    \
37         (512 * 1024 - CONFIG_SPL_ONENAND_LOAD_ADDR)
38 #define CONFIG_SPL_TEXT_BASE    0x5c000000
39 #define CONFIG_SPL_LDSCRIPT     "board/vpac270/u-boot-spl.lds"
40 #endif
41
42 /*
43  * Environment settings
44  */
45 #define CONFIG_ENV_OVERWRITE
46 #define CONFIG_SYS_MALLOC_LEN           (128*1024)
47 #define CONFIG_ARCH_CPU_INIT
48 #define CONFIG_BOOTCOMMAND                                              \
49         "if mmc init && fatload mmc 0 0xa4000000 uImage; then "         \
50                 "bootm 0xa4000000; "                                    \
51         "fi; "                                                          \
52         "if usb reset && fatload usb 0 0xa4000000 uImage; then "        \
53                 "bootm 0xa4000000; "                                    \
54         "fi; "                                                          \
55         "if ide reset && fatload ide 0 0xa4000000 uImage; then "        \
56                 "bootm 0xa4000000; "                                    \
57         "fi; "                                                          \
58         "bootm 0x60000;"
59
60 #define CONFIG_EXTRA_ENV_SETTINGS                                       \
61         "update_onenand="                                               \
62                 "onenand erase 0x0 0x80000 ; "                          \
63                 "onenand write 0xa0000000 0x0 0x80000"
64
65 #define CONFIG_BOOTARGS                 "console=tty0 console=ttyS0,115200"
66 #define CONFIG_TIMESTAMP
67 #define CONFIG_BOOTDELAY                2       /* Autoboot delay */
68 #define CONFIG_CMDLINE_TAG
69 #define CONFIG_SETUP_MEMORY_TAGS
70 #define CONFIG_LZMA                     /* LZMA compression support */
71 #define CONFIG_OF_LIBFDT
72
73 /*
74  * Serial Console Configuration
75  */
76 #define CONFIG_PXA_SERIAL
77 #define CONFIG_FFUART                   1
78 #define CONFIG_BAUDRATE                 115200
79 #define CONFIG_SYS_BAUDRATE_TABLE       { 9600, 19200, 38400, 57600, 115200 }
80
81 /*
82  * Bootloader Components Configuration
83  */
84 #include <config_cmd_default.h>
85
86 #define CONFIG_CMD_NET
87 #define CONFIG_CMD_ENV
88 #undef  CONFIG_CMD_IMLS
89 #define CONFIG_CMD_MMC
90 #define CONFIG_CMD_USB
91 #undef  CONFIG_LCD
92 #define CONFIG_CMD_IDE
93
94 #ifdef  CONFIG_ONENAND
95 #undef  CONFIG_CMD_FLASH
96 #define CONFIG_CMD_ONENAND
97 #else
98 #define CONFIG_CMD_FLASH
99 #undef  CONFIG_CMD_ONENAND
100 #endif
101
102 /*
103  * Networking Configuration
104  *  chip on the Voipac PXA270 board
105  */
106 #ifdef  CONFIG_CMD_NET
107 #define CONFIG_CMD_PING
108 #define CONFIG_CMD_DHCP
109
110 #define CONFIG_DRIVER_DM9000            1
111 #define CONFIG_DM9000_BASE              0x08000300      /* CS2 */
112 #define DM9000_IO                       (CONFIG_DM9000_BASE)
113 #define DM9000_DATA                     (CONFIG_DM9000_BASE + 4)
114 #define CONFIG_NET_RETRY_COUNT          10
115
116 #define CONFIG_BOOTP_BOOTFILESIZE
117 #define CONFIG_BOOTP_BOOTPATH
118 #define CONFIG_BOOTP_GATEWAY
119 #define CONFIG_BOOTP_HOSTNAME
120 #endif
121
122 /*
123  * MMC Card Configuration
124  */
125 #ifdef  CONFIG_CMD_MMC
126 #define CONFIG_MMC
127 #define CONFIG_GENERIC_MMC
128 #define CONFIG_PXA_MMC_GENERIC
129 #define CONFIG_SYS_MMC_BASE             0xF0000000
130 #define CONFIG_CMD_FAT
131 #define CONFIG_CMD_EXT2
132 #define CONFIG_DOS_PARTITION
133 #endif
134
135 /*
136  * KGDB
137  */
138 #ifdef  CONFIG_CMD_KGDB
139 #define CONFIG_KGDB_BAUDRATE            230400  /* kgdb serial port speed */
140 #define CONFIG_KGDB_SER_INDEX           2       /* which serial port to use */
141 #endif
142
143 /*
144  * HUSH Shell Configuration
145  */
146 #define CONFIG_SYS_HUSH_PARSER          1
147 #define CONFIG_SYS_PROMPT_HUSH_PS2      "> "
148
149 #define CONFIG_SYS_LONGHELP
150 #ifdef  CONFIG_SYS_HUSH_PARSER
151 #define CONFIG_SYS_PROMPT               "$ "
152 #else
153 #define CONFIG_SYS_PROMPT               "=> "
154 #endif
155 #define CONFIG_SYS_CBSIZE               256
156 #define CONFIG_SYS_PBSIZE               \
157         (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
158 #define CONFIG_SYS_MAXARGS              16
159 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE
160 #define CONFIG_SYS_DEVICE_NULLDEV       1
161 #define CONFIG_CMDLINE_EDITING          1
162 #define CONFIG_AUTO_COMPLETE            1
163
164 /*
165  * Clock Configuration
166  */
167 #define CONFIG_SYS_HZ                   1000            /* Timer @ 3250000 Hz */
168 #define CONFIG_SYS_CPUSPEED             0x190           /* 312MHz */
169
170 /*
171  * Stack sizes
172  */
173 #define CONFIG_STACKSIZE                (128*1024)      /* regular stack */
174 #ifdef  CONFIG_USE_IRQ
175 #define CONFIG_STACKSIZE_IRQ            (4*1024)        /* IRQ stack */
176 #define CONFIG_STACKSIZE_FIQ            (4*1024)        /* FIQ stack */
177 #endif
178
179 /*
180  * DRAM Map
181  */
182 #define CONFIG_NR_DRAM_BANKS            2               /* 2 banks of DRAM */
183 #define PHYS_SDRAM_1                    0xa0000000      /* SDRAM Bank #1 */
184 #define PHYS_SDRAM_1_SIZE               0x08000000      /* 128 MB */
185
186 #ifdef  CONFIG_RAM_256M
187 #define PHYS_SDRAM_2                    0x80000000      /* SDRAM Bank #2 */
188 #define PHYS_SDRAM_2_SIZE               0x08000000      /* 128 MB */
189 #endif
190
191 #define CONFIG_SYS_DRAM_BASE            0xa0000000      /* CS0 */
192 #ifdef  CONFIG_RAM_256M
193 #define CONFIG_SYS_DRAM_SIZE            0x10000000      /* 256 MB DRAM */
194 #else
195 #define CONFIG_SYS_DRAM_SIZE            0x08000000      /* 128 MB DRAM */
196 #endif
197
198 #define CONFIG_SYS_MEMTEST_START        0xa0400000      /* memtest works on */
199 #define CONFIG_SYS_MEMTEST_END          0xa0800000      /* 4 ... 8 MB in DRAM */
200
201 #define CONFIG_SYS_LOAD_ADDR            PHYS_SDRAM_1
202 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
203 #define CONFIG_SYS_INIT_SP_ADDR         0x5c010000
204
205 /*
206  * NOR FLASH
207  */
208 #define CONFIG_SYS_MONITOR_BASE         0x0
209 #define CONFIG_SYS_MONITOR_LEN          0x80000
210 #define CONFIG_ENV_ADDR                 \
211                         (CONFIG_SYS_MONITOR_BASE + CONFIG_SYS_MONITOR_LEN)
212 #define CONFIG_ENV_SIZE                 0x4000
213
214 #if     defined(CONFIG_CMD_FLASH)       /* NOR */
215 #define PHYS_FLASH_1                    0x00000000      /* Flash Bank #1 */
216
217 #ifdef  CONFIG_RAM_256M
218 #define PHYS_FLASH_2                    0x02000000      /* Flash Bank #2 */
219 #endif
220
221 #define CONFIG_SYS_FLASH_CFI
222 #define CONFIG_FLASH_CFI_DRIVER         1
223
224 #define CONFIG_SYS_MAX_FLASH_SECT       (4 + 255)
225 #ifdef  CONFIG_RAM_256M
226 #define CONFIG_SYS_MAX_FLASH_BANKS      2
227 #define CONFIG_SYS_FLASH_BANKS_LIST     { PHYS_FLASH_1, PHYS_FLASH_2 }
228 #else
229 #define CONFIG_SYS_MAX_FLASH_BANKS      1
230 #define CONFIG_SYS_FLASH_BASE           PHYS_FLASH_1
231 #endif
232
233 #define CONFIG_SYS_FLASH_ERASE_TOUT     (25*CONFIG_SYS_HZ)
234 #define CONFIG_SYS_FLASH_WRITE_TOUT     (25*CONFIG_SYS_HZ)
235
236 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE       1
237 #define CONFIG_SYS_FLASH_PROTECTION             1
238
239 #define CONFIG_ENV_IS_IN_FLASH          1
240
241 /*
242  * The first four sectors of the NOR flash are 0x8000 bytes big, the rest of the
243  * flash consists of 0x20000 bytes big sectors.
244  */
245 #if     (CONFIG_ENV_ADDR <= 0x18000)
246 #define CONFIG_ENV_SECT_SIZE            0x8000
247 #else
248 #define CONFIG_ENV_SECT_SIZE            0x20000
249 #endif
250
251 #elif   defined(CONFIG_CMD_ONENAND)     /* OneNAND */
252 #define CONFIG_SYS_NO_FLASH
253 #define CONFIG_SYS_ONENAND_BASE         0x00000000
254
255 #define CONFIG_ENV_IS_IN_ONENAND        1
256 #define CONFIG_ENV_SECT_SIZE            0x20000
257
258 #else   /* No flash */
259 #define CONFIG_SYS_NO_FLASH
260 #define CONFIG_SYS_ENV_IS_NOWHERE
261 #endif
262
263 /*
264  * IDE
265  */
266 #ifdef  CONFIG_CMD_IDE
267 #define CONFIG_LBA48
268 #undef  CONFIG_IDE_LED
269 #undef  CONFIG_IDE_RESET
270
271 #define __io
272
273 #define CONFIG_SYS_IDE_MAXBUS           1
274 #define CONFIG_SYS_IDE_MAXDEVICE        1
275
276 #define CONFIG_SYS_ATA_BASE_ADDR        0x0c000000
277 #define CONFIG_SYS_ATA_IDE0_OFFSET      0x0
278
279 #define CONFIG_SYS_ATA_DATA_OFFSET      0x120
280 #define CONFIG_SYS_ATA_REG_OFFSET       0x120
281 #define CONFIG_SYS_ATA_ALT_OFFSET       0x120
282
283 #define CONFIG_SYS_ATA_STRIDE           2
284 #endif
285
286 /*
287  * GPIO settings
288  */
289 #define CONFIG_SYS_GPSR0_VAL    0x01308800
290 #define CONFIG_SYS_GPSR1_VAL    0x00cf0000
291 #define CONFIG_SYS_GPSR2_VAL    0x922ac000
292 #define CONFIG_SYS_GPSR3_VAL    0x0161e800
293
294 #define CONFIG_SYS_GPCR0_VAL    0x00010000
295 #define CONFIG_SYS_GPCR1_VAL    0x0
296 #define CONFIG_SYS_GPCR2_VAL    0x0
297 #define CONFIG_SYS_GPCR3_VAL    0x0
298
299 #define CONFIG_SYS_GPDR0_VAL    0xcbb18800
300 #define CONFIG_SYS_GPDR1_VAL    0xfccfa981
301 #define CONFIG_SYS_GPDR2_VAL    0x922affff
302 #define CONFIG_SYS_GPDR3_VAL    0x0161e904
303
304 #define CONFIG_SYS_GAFR0_L_VAL  0x00100000
305 #define CONFIG_SYS_GAFR0_U_VAL  0xa5da8510
306 #define CONFIG_SYS_GAFR1_L_VAL  0x6992901a
307 #define CONFIG_SYS_GAFR1_U_VAL  0xaaa5a0aa
308 #define CONFIG_SYS_GAFR2_L_VAL  0xaaaaaaaa
309 #define CONFIG_SYS_GAFR2_U_VAL  0x4109a401
310 #define CONFIG_SYS_GAFR3_L_VAL  0x54010310
311 #define CONFIG_SYS_GAFR3_U_VAL  0x00025401
312
313 #define CONFIG_SYS_PSSR_VAL     0x30
314
315 /*
316  * Clock settings
317  */
318 #define CONFIG_SYS_CKEN         0x00500240
319 #define CONFIG_SYS_CCCR         0x02000290
320
321 /*
322  * Memory settings
323  */
324 #define CONFIG_SYS_MSC0_VAL     0x3ffc95fa
325 #define CONFIG_SYS_MSC1_VAL     0x02ccf974
326 #define CONFIG_SYS_MSC2_VAL     0x00000000
327 #ifdef  CONFIG_RAM_256M
328 #define CONFIG_SYS_MDCNFG_VAL   0x8ad30ad3
329 #else
330 #define CONFIG_SYS_MDCNFG_VAL   0x88000ad3
331 #endif
332 #define CONFIG_SYS_MDREFR_VAL   0x201fe01e
333 #define CONFIG_SYS_MDMRS_VAL    0x00000000
334 #define CONFIG_SYS_FLYCNFG_VAL  0x00000000
335 #define CONFIG_SYS_SXCNFG_VAL   0x40044004
336 #define CONFIG_SYS_MEM_BUF_IMP  0x0f
337
338 /*
339  * PCMCIA and CF Interfaces
340  */
341 #define CONFIG_SYS_MECR_VAL     0x00000001
342 #define CONFIG_SYS_MCMEM0_VAL   0x00014307
343 #define CONFIG_SYS_MCMEM1_VAL   0x00014307
344 #define CONFIG_SYS_MCATT0_VAL   0x0001c787
345 #define CONFIG_SYS_MCATT1_VAL   0x0001c787
346 #define CONFIG_SYS_MCIO0_VAL    0x0001430f
347 #define CONFIG_SYS_MCIO1_VAL    0x0001430f
348
349 /*
350  * LCD
351  */
352 #ifdef  CONFIG_LCD
353 #define CONFIG_VOIPAC_LCD
354 #endif
355
356 /*
357  * USB
358  */
359 #ifdef  CONFIG_CMD_USB
360 #define CONFIG_USB_OHCI_NEW
361 #define CONFIG_SYS_USB_OHCI_CPU_INIT
362 #define CONFIG_SYS_USB_OHCI_BOARD_INIT
363 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS      2
364 #define CONFIG_SYS_USB_OHCI_REGS_BASE   0x4C000000
365 #define CONFIG_SYS_USB_OHCI_SLOT_NAME   "vpac270"
366 #define CONFIG_USB_STORAGE
367 #endif
368
369 #endif  /* __CONFIG_H */