1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright 2013 Freescale Semiconductor, Inc.
5 * Configuration settings for the Freescale Vybrid vf610twr board.
11 #include <asm/arch/imx-regs.h>
12 #include <linux/stringify.h>
14 #define CONFIG_SYS_FSL_CLK
16 #define CONFIG_MACH_TYPE 4146
18 #define CONFIG_SKIP_LOWLEVEL_INIT
20 /* Enable passing of ATAGs */
21 #define CONFIG_CMDLINE_TAG
23 /* Size of malloc() pool */
24 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
26 /* Allow to overwrite serial and ethaddr */
27 #define CONFIG_ENV_OVERWRITE
30 #define CONFIG_SYS_NAND_ONFI_DETECTION
32 #ifdef CONFIG_CMD_NAND
33 #define CONFIG_SYS_MAX_NAND_DEVICE 1
34 #define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR
36 /* Dynamic MTD partition support */
39 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
40 #define CONFIG_SYS_FSL_ESDHC_NUM 1
42 #define CONFIG_FEC_MXC
43 #define IMX_FEC_BASE ENET_BASE_ADDR
44 #define CONFIG_FEC_XCV_TYPE RMII
45 #define CONFIG_FEC_MXC_PHYADDR 0
48 #define CONFIG_SYS_I2C
49 #define CONFIG_SYS_I2C_MXC
50 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
51 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
52 #define CONFIG_SYS_SPD_BUS_NUM 0
55 #define CONFIG_SYS_LOAD_ADDR 0x82000000
57 /* We boot from the gfxRAM area of the OCRAM. */
58 #define CONFIG_BOARD_SIZE_LIMIT 520192
61 * We do have 128MB of memory on the Vybrid Tower board. Leave the last
62 * 16MB alone to avoid conflicts with Cortex-M4 firmwares running from
63 * DDR3. Hence, limit the memory range for image processing to 112MB
64 * using bootm_size. All of the following must be within this range.
65 * We have the default load at 32MB into DDR (for the kernel), FDT at
66 * 64MB and the ramdisk 512KB above that (allowing for hopefully never
67 * seen large trees). This allows a reasonable split between ramdisk
68 * and kernel size, where the ram disk can be a bit larger.
70 #define MEM_LAYOUT_ENV_SETTINGS \
71 "bootm_size=0x07000000\0" \
72 "loadaddr=0x82000000\0" \
73 "kernel_addr_r=0x82000000\0" \
74 "fdt_addr=0x84000000\0" \
75 "fdt_addr_r=0x84000000\0" \
76 "rdaddr=0x84080000\0" \
77 "ramdisk_addr_r=0x84080000\0"
79 #define CONFIG_EXTRA_ENV_SETTINGS \
80 MEM_LAYOUT_ENV_SETTINGS \
84 "fdt_file=vf610-twr.dtb\0" \
87 "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
89 "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
90 "update_sd_firmware_filename=u-boot.imx\0" \
91 "update_sd_firmware=" \
92 "if test ${ip_dyn} = yes; then " \
93 "setenv get_cmd dhcp; " \
95 "setenv get_cmd tftp; " \
97 "if mmc dev ${mmcdev}; then " \
98 "if ${get_cmd} ${update_sd_firmware_filename}; then " \
99 "setexpr fw_sz ${filesize} / 0x200; " \
100 "setexpr fw_sz ${fw_sz} + 1; " \
101 "mmc write ${loadaddr} 0x2 ${fw_sz}; " \
104 "mmcargs=setenv bootargs console=${console},${baudrate} " \
105 "root=${mmcroot}\0" \
107 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
108 "bootscript=echo Running bootscript from mmc ...; " \
110 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
111 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
112 "mmcboot=echo Booting from mmc ...; " \
114 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
115 "if run loadfdt; then " \
116 "bootz ${loadaddr} - ${fdt_addr}; " \
118 "if test ${boot_fdt} = try; then " \
121 "echo WARN: Cannot load the DT; " \
127 "netargs=setenv bootargs console=${console},${baudrate} " \
129 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
130 "netboot=echo Booting from net ...; " \
132 "if test ${ip_dyn} = yes; then " \
133 "setenv get_cmd dhcp; " \
135 "setenv get_cmd tftp; " \
137 "${get_cmd} ${image}; " \
138 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
139 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
140 "bootz ${loadaddr} - ${fdt_addr}; " \
142 "if test ${boot_fdt} = try; then " \
145 "echo WARN: Cannot load the DT; " \
152 #define CONFIG_BOOTCOMMAND \
153 "mmc dev ${mmcdev}; if mmc rescan; then " \
154 "if run loadbootscript; then " \
157 "if run loadimage; then " \
159 "else run netboot; " \
162 "else run netboot; fi"
164 /* Miscellaneous configurable options */
166 /* Physical memory map */
167 #define PHYS_SDRAM (0x80000000)
168 #define PHYS_SDRAM_SIZE (128 * 1024 * 1024)
170 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
171 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
172 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
174 #define CONFIG_SYS_INIT_SP_OFFSET \
175 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
176 #define CONFIG_SYS_INIT_SP_ADDR \
177 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
179 #ifdef CONFIG_ENV_IS_IN_MMC
180 #define CONFIG_SYS_MMC_ENV_DEV 0
183 #ifdef CONFIG_ENV_IS_IN_NAND
184 #define CONFIG_ENV_RANGE (512 * 1024)