1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright 2013 Freescale Semiconductor, Inc.
5 * Configuration settings for the Freescale Vybrid vf610twr board.
11 #include <asm/arch/imx-regs.h>
13 #define CONFIG_SYS_FSL_CLK
15 #define CONFIG_MACH_TYPE 4146
17 #define CONFIG_SKIP_LOWLEVEL_INIT
19 /* Enable passing of ATAGs */
20 #define CONFIG_CMDLINE_TAG
22 #ifdef CONFIG_CMD_FUSE
23 #define CONFIG_MXC_OCOTP
26 /* Size of malloc() pool */
27 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + 2 * 1024 * 1024)
29 /* Allow to overwrite serial and ethaddr */
30 #define CONFIG_ENV_OVERWRITE
33 #define CONFIG_SYS_NAND_ONFI_DETECTION
35 #ifdef CONFIG_CMD_NAND
36 #define CONFIG_SYS_MAX_NAND_DEVICE 1
37 #define CONFIG_SYS_NAND_BASE NFC_BASE_ADDR
39 /* Dynamic MTD partition support */
40 #define CONFIG_MTD_PARTITIONS
41 #define CONFIG_MTD_DEVICE
44 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
45 #define CONFIG_SYS_FSL_ESDHC_NUM 1
47 #define CONFIG_FEC_MXC
49 #define IMX_FEC_BASE ENET_BASE_ADDR
50 #define CONFIG_FEC_XCV_TYPE RMII
51 #define CONFIG_FEC_MXC_PHYADDR 0
55 #ifdef CONFIG_FSL_QSPI
56 #define FSL_QSPI_FLASH_SIZE (1 << 24)
57 #define FSL_QSPI_FLASH_NUM 2
58 #define CONFIG_SYS_FSL_QSPI_LE
62 #define CONFIG_SYS_I2C
63 #define CONFIG_SYS_I2C_MXC
64 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
65 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
66 #define CONFIG_SYS_SPD_BUS_NUM 0
69 #define CONFIG_SYS_LOAD_ADDR 0x82000000
71 /* We boot from the gfxRAM area of the OCRAM. */
72 #define CONFIG_BOARD_SIZE_LIMIT 520192
75 * We do have 128MB of memory on the Vybrid Tower board. Leave the last
76 * 16MB alone to avoid conflicts with Cortex-M4 firmwares running from
77 * DDR3. Hence, limit the memory range for image processing to 112MB
78 * using bootm_size. All of the following must be within this range.
79 * We have the default load at 32MB into DDR (for the kernel), FDT at
80 * 64MB and the ramdisk 512KB above that (allowing for hopefully never
81 * seen large trees). This allows a reasonable split between ramdisk
82 * and kernel size, where the ram disk can be a bit larger.
84 #define MEM_LAYOUT_ENV_SETTINGS \
85 "bootm_size=0x07000000\0" \
86 "loadaddr=0x82000000\0" \
87 "kernel_addr_r=0x82000000\0" \
88 "fdt_addr=0x84000000\0" \
89 "fdt_addr_r=0x84000000\0" \
90 "rdaddr=0x84080000\0" \
91 "ramdisk_addr_r=0x84080000\0"
93 #define CONFIG_EXTRA_ENV_SETTINGS \
94 MEM_LAYOUT_ENV_SETTINGS \
98 "fdt_file=vf610-twr.dtb\0" \
101 "mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
103 "mmcroot=/dev/mmcblk0p2 rootwait rw\0" \
104 "update_sd_firmware_filename=u-boot.imx\0" \
105 "update_sd_firmware=" \
106 "if test ${ip_dyn} = yes; then " \
107 "setenv get_cmd dhcp; " \
109 "setenv get_cmd tftp; " \
111 "if mmc dev ${mmcdev}; then " \
112 "if ${get_cmd} ${update_sd_firmware_filename}; then " \
113 "setexpr fw_sz ${filesize} / 0x200; " \
114 "setexpr fw_sz ${fw_sz} + 1; " \
115 "mmc write ${loadaddr} 0x2 ${fw_sz}; " \
118 "mmcargs=setenv bootargs console=${console},${baudrate} " \
119 "root=${mmcroot}\0" \
121 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
122 "bootscript=echo Running bootscript from mmc ...; " \
124 "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
125 "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
126 "mmcboot=echo Booting from mmc ...; " \
128 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
129 "if run loadfdt; then " \
130 "bootz ${loadaddr} - ${fdt_addr}; " \
132 "if test ${boot_fdt} = try; then " \
135 "echo WARN: Cannot load the DT; " \
141 "netargs=setenv bootargs console=${console},${baudrate} " \
143 "ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
144 "netboot=echo Booting from net ...; " \
146 "if test ${ip_dyn} = yes; then " \
147 "setenv get_cmd dhcp; " \
149 "setenv get_cmd tftp; " \
151 "${get_cmd} ${image}; " \
152 "if test ${boot_fdt} = yes || test ${boot_fdt} = try; then " \
153 "if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
154 "bootz ${loadaddr} - ${fdt_addr}; " \
156 "if test ${boot_fdt} = try; then " \
159 "echo WARN: Cannot load the DT; " \
166 #define CONFIG_BOOTCOMMAND \
167 "mmc dev ${mmcdev}; if mmc rescan; then " \
168 "if run loadbootscript; then " \
171 "if run loadimage; then " \
173 "else run netboot; " \
176 "else run netboot; fi"
178 /* Miscellaneous configurable options */
180 #define CONFIG_SYS_MEMTEST_START 0x80010000
181 #define CONFIG_SYS_MEMTEST_END 0x87C00000
183 /* Physical memory map */
184 #define CONFIG_NR_DRAM_BANKS 1
185 #define PHYS_SDRAM (0x80000000)
186 #define PHYS_SDRAM_SIZE (128 * 1024 * 1024)
188 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
189 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
190 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
192 #define CONFIG_SYS_INIT_SP_OFFSET \
193 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
194 #define CONFIG_SYS_INIT_SP_ADDR \
195 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
197 #ifdef CONFIG_ENV_IS_IN_MMC
198 #define CONFIG_ENV_SIZE (8 * 1024)
200 #define CONFIG_ENV_OFFSET (12 * 64 * 1024)
201 #define CONFIG_SYS_MMC_ENV_DEV 0
204 #ifdef CONFIG_ENV_IS_IN_NAND
205 #define CONFIG_ENV_SIZE (64 * 2048)
206 #define CONFIG_ENV_SECT_SIZE (64 * 2048)
207 #define CONFIG_ENV_RANGE (512 * 1024)
208 #define CONFIG_ENV_OFFSET 0x180000