treewide: mem: Move mtest related defines to Kconfig
[platform/kernel/u-boot.git] / include / configs / vexpress_aemv8a.h
1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * Configuration for Versatile Express. Parts were derived from other ARM
4  *   configurations.
5  */
6
7 #ifndef __VEXPRESS_AEMV8A_H
8 #define __VEXPRESS_AEMV8A_H
9
10 #define CONFIG_REMAKE_ELF
11
12 /* Link Definitions */
13 #ifdef CONFIG_TARGET_VEXPRESS64_BASE_FVP
14 /* ATF loads u-boot here for BASE_FVP model */
15 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_SDRAM_BASE + 0x03f00000)
16 #elif CONFIG_TARGET_VEXPRESS64_JUNO
17 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
18 #endif
19
20 #define CONFIG_SYS_BOOTM_LEN (64 << 20)      /* Increase max gunzip size */
21
22 /* CS register bases for the original memory map. */
23 #define V2M_PA_CS0                      0x00000000
24 #define V2M_PA_CS1                      0x14000000
25 #define V2M_PA_CS2                      0x18000000
26 #define V2M_PA_CS3                      0x1c000000
27 #define V2M_PA_CS4                      0x0c000000
28 #define V2M_PA_CS5                      0x10000000
29
30 #define V2M_PERIPH_OFFSET(x)            (x << 16)
31 #define V2M_SYSREGS                     (V2M_PA_CS3 + V2M_PERIPH_OFFSET(1))
32 #define V2M_SYSCTL                      (V2M_PA_CS3 + V2M_PERIPH_OFFSET(2))
33 #define V2M_SERIAL_BUS_PCI              (V2M_PA_CS3 + V2M_PERIPH_OFFSET(3))
34
35 #define V2M_BASE                        0x80000000
36
37 /* Common peripherals relative to CS7. */
38 #define V2M_AACI                        (V2M_PA_CS3 + V2M_PERIPH_OFFSET(4))
39 #define V2M_MMCI                        (V2M_PA_CS3 + V2M_PERIPH_OFFSET(5))
40 #define V2M_KMI0                        (V2M_PA_CS3 + V2M_PERIPH_OFFSET(6))
41 #define V2M_KMI1                        (V2M_PA_CS3 + V2M_PERIPH_OFFSET(7))
42
43 #ifdef CONFIG_TARGET_VEXPRESS64_JUNO
44 #define V2M_UART0                       0x7ff80000
45 #define V2M_UART1                       0x7ff70000
46 #else /* Not Juno */
47 #define V2M_UART0                       (V2M_PA_CS3 + V2M_PERIPH_OFFSET(9))
48 #define V2M_UART1                       (V2M_PA_CS3 + V2M_PERIPH_OFFSET(10))
49 #define V2M_UART2                       (V2M_PA_CS3 + V2M_PERIPH_OFFSET(11))
50 #define V2M_UART3                       (V2M_PA_CS3 + V2M_PERIPH_OFFSET(12))
51 #endif
52
53 #define V2M_WDT                         (V2M_PA_CS3 + V2M_PERIPH_OFFSET(15))
54
55 #define V2M_TIMER01                     (V2M_PA_CS3 + V2M_PERIPH_OFFSET(17))
56 #define V2M_TIMER23                     (V2M_PA_CS3 + V2M_PERIPH_OFFSET(18))
57
58 #define V2M_SERIAL_BUS_DVI              (V2M_PA_CS3 + V2M_PERIPH_OFFSET(22))
59 #define V2M_RTC                         (V2M_PA_CS3 + V2M_PERIPH_OFFSET(23))
60
61 #define V2M_CF                          (V2M_PA_CS3 + V2M_PERIPH_OFFSET(26))
62
63 #define V2M_CLCD                        (V2M_PA_CS3 + V2M_PERIPH_OFFSET(31))
64
65 /* System register offsets. */
66 #define V2M_SYS_CFGDATA                 (V2M_SYSREGS + 0x0a0)
67 #define V2M_SYS_CFGCTRL                 (V2M_SYSREGS + 0x0a4)
68 #define V2M_SYS_CFGSTAT                 (V2M_SYSREGS + 0x0a8)
69
70 /* Generic Timer Definitions */
71 #define COUNTER_FREQUENCY               (0x1800000)     /* 24MHz */
72
73 /* Generic Interrupt Controller Definitions */
74 #ifdef CONFIG_GICV3
75 #define GICD_BASE                       (0x2f000000)
76 #define GICR_BASE                       (0x2f100000)
77 #else
78
79 #ifdef CONFIG_TARGET_VEXPRESS64_BASE_FVP
80 #define GICD_BASE                       (0x2f000000)
81 #define GICC_BASE                       (0x2c000000)
82 #elif CONFIG_TARGET_VEXPRESS64_JUNO
83 #define GICD_BASE                       (0x2C010000)
84 #define GICC_BASE                       (0x2C02f000)
85 #endif
86 #endif /* !CONFIG_GICV3 */
87
88 /* Size of malloc() pool */
89 #define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + (8 << 20))
90
91 #ifndef CONFIG_TARGET_VEXPRESS64_JUNO
92 /* The Vexpress64 simulators use SMSC91C111 */
93 #define CONFIG_SMC91111                 1
94 #define CONFIG_SMC91111_BASE            (0x01A000000)
95 #endif
96
97 /* PL011 Serial Configuration */
98 #ifdef CONFIG_TARGET_VEXPRESS64_JUNO
99 #define CONFIG_PL011_CLOCK              7372800
100 #else
101 #define CONFIG_PL011_CLOCK              24000000
102 #endif
103
104 /* BOOTP options */
105 #define CONFIG_BOOTP_BOOTFILESIZE
106
107 /* Miscellaneous configurable options */
108 #define CONFIG_SYS_LOAD_ADDR            (V2M_BASE + 0x10000000)
109
110 /* Physical Memory Map */
111 #define PHYS_SDRAM_1                    (V2M_BASE)      /* SDRAM Bank #1 */
112 /* Top 16MB reserved for secure world use */
113 #define DRAM_SEC_SIZE           0x01000000
114 #define PHYS_SDRAM_1_SIZE       0x80000000 - DRAM_SEC_SIZE
115 #define CONFIG_SYS_SDRAM_BASE   PHYS_SDRAM_1
116
117 #ifdef CONFIG_TARGET_VEXPRESS64_JUNO
118 #define PHYS_SDRAM_2                    (0x880000000)
119 #define PHYS_SDRAM_2_SIZE               0x180000000
120 #endif
121
122 /* Enable memtest */
123
124 /* Initial environment variables */
125 #ifdef CONFIG_TARGET_VEXPRESS64_JUNO
126 /*
127  * Defines where the kernel and FDT exist in NOR flash and where it will
128  * be copied into DRAM
129  */
130 #define CONFIG_EXTRA_ENV_SETTINGS       \
131                                 "kernel_name=norkern\0" \
132                                 "kernel_alt_name=Image\0"       \
133                                 "kernel_addr_r=0x80080000\0" \
134                                 "ramdisk_name=ramdisk.img\0"    \
135                                 "ramdisk_addr_r=0x88000000\0"   \
136                                 "fdtfile=board.dtb\0" \
137                                 "fdt_alt_name=juno\0" \
138                                 "fdt_addr_r=0x80000000\0" \
139
140 /* Copy the kernel and FDT to DRAM memory and boot */
141 #define CONFIG_BOOTCOMMAND      "afs load ${kernel_name} ${kernel_addr_r} ;"\
142                                 "if test $? -eq 1; then "\
143                                 "  echo Loading ${kernel_alt_name} instead of "\
144                                 "${kernel_name}; "\
145                                 "  afs load ${kernel_alt_name} ${kernel_addr_r};"\
146                                 "fi ; "\
147                                 "afs load ${fdtfile} ${fdt_addr_r} ;"\
148                                 "if test $? -eq 1; then "\
149                                 "  echo Loading ${fdt_alt_name} instead of "\
150                                 "${fdtfile}; "\
151                                 "  afs load ${fdt_alt_name} ${fdt_addr_r}; "\
152                                 "fi ; "\
153                                 "fdt addr ${fdt_addr_r}; fdt resize; " \
154                                 "if afs load  ${ramdisk_name} ${ramdisk_addr_r} ; "\
155                                 "then "\
156                                 "  setenv ramdisk_param ${ramdisk_addr_r}; "\
157                                 "  else setenv ramdisk_param -; "\
158                                 "fi ; " \
159                                 "booti ${kernel_addr_r} ${ramdisk_param} ${fdt_addr_r}"
160
161
162 #elif CONFIG_TARGET_VEXPRESS64_BASE_FVP
163 #define CONFIG_EXTRA_ENV_SETTINGS       \
164                                 "kernel_name=Image\0"           \
165                                 "kernel_addr=0x80080000\0"      \
166                                 "initrd_name=ramdisk.img\0"     \
167                                 "initrd_addr=0x88000000\0"      \
168                                 "fdtfile=devtree.dtb\0"         \
169                                 "fdt_addr=0x83000000\0"         \
170                                 "boot_name=boot.img\0"          \
171                                 "boot_addr=0x8007f800\0"
172
173 #define CONFIG_BOOTCOMMAND      "if smhload ${boot_name} ${boot_addr}; then " \
174                                 "  set bootargs; " \
175                                 "  abootimg addr ${boot_addr}; " \
176                                 "  abootimg get dtb --index=0 fdt_addr; " \
177                                 "  bootm ${boot_addr} ${boot_addr} " \
178                                 "  ${fdt_addr}; " \
179                                 "else; " \
180                                 "  set fdt_high 0xffffffffffffffff; " \
181                                 "  set initrd_high 0xffffffffffffffff; " \
182                                 "  smhload ${kernel_name} ${kernel_addr}; " \
183                                 "  smhload ${fdtfile} ${fdt_addr}; " \
184                                 "  smhload ${initrd_name} ${initrd_addr} "\
185                                 "  initrd_end; " \
186                                 "  fdt addr ${fdt_addr}; fdt resize; " \
187                                 "  fdt chosen ${initrd_addr} ${initrd_end}; " \
188                                 "  booti $kernel_addr - $fdt_addr; " \
189                                 "fi"
190
191
192 #endif
193
194 /* Monitor Command Prompt */
195 #define CONFIG_SYS_CBSIZE               512     /* Console I/O Buffer Size */
196 #define CONFIG_SYS_MAXARGS              64      /* max command args */
197
198 #ifdef CONFIG_TARGET_VEXPRESS64_JUNO
199 #define CONFIG_SYS_FLASH_BASE           0x08000000
200 /* 255 x 256KiB sectors + 4 x 64KiB sectors at the end = 259 */
201 #define CONFIG_SYS_MAX_FLASH_SECT       259
202 /* Store environment at top of flash in the same location as blank.img */
203 /* in the Juno firmware. */
204 #else
205 #define CONFIG_SYS_FLASH_BASE           0x0C000000
206 /* 256 x 256KiB sectors */
207 #define CONFIG_SYS_MAX_FLASH_SECT       256
208 /* Store environment at top of flash */
209 #endif
210
211 #define CONFIG_SYS_FLASH_CFI_WIDTH      FLASH_CFI_32BIT
212 #define CONFIG_SYS_MAX_FLASH_BANKS      1
213
214 #ifdef CONFIG_USB_EHCI_HCD
215 #define CONFIG_USB_OHCI_NEW
216 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1
217 #endif
218
219 #define CONFIG_SYS_FLASH_EMPTY_INFO     /* flinfo indicates empty blocks */
220 #define FLASH_MAX_SECTOR_SIZE           0x00040000
221
222 #endif /* __VEXPRESS_AEMV8A_H */