1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Configuration for Versatile Express. Parts were derived from other ARM
7 #ifndef __VEXPRESS_AEMV8A_H
8 #define __VEXPRESS_AEMV8A_H
10 #ifdef CONFIG_TARGET_VEXPRESS64_BASE_FVP
11 #ifndef CONFIG_SEMIHOSTING
12 #error CONFIG_TARGET_VEXPRESS64_BASE_FVP requires CONFIG_SEMIHOSTING
16 #define CONFIG_REMAKE_ELF
18 /* Link Definitions */
19 #if defined(CONFIG_TARGET_VEXPRESS64_BASE_FVP) || \
20 defined(CONFIG_TARGET_VEXPRESS64_BASE_FVP_DRAM)
21 /* ATF loads u-boot here for BASE_FVP model */
22 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x03f00000)
23 #elif CONFIG_TARGET_VEXPRESS64_JUNO
24 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
27 #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
29 /* CS register bases for the original memory map. */
30 #define V2M_PA_CS0 0x00000000
31 #define V2M_PA_CS1 0x14000000
32 #define V2M_PA_CS2 0x18000000
33 #define V2M_PA_CS3 0x1c000000
34 #define V2M_PA_CS4 0x0c000000
35 #define V2M_PA_CS5 0x10000000
37 #define V2M_PERIPH_OFFSET(x) (x << 16)
38 #define V2M_SYSREGS (V2M_PA_CS3 + V2M_PERIPH_OFFSET(1))
39 #define V2M_SYSCTL (V2M_PA_CS3 + V2M_PERIPH_OFFSET(2))
40 #define V2M_SERIAL_BUS_PCI (V2M_PA_CS3 + V2M_PERIPH_OFFSET(3))
42 #define V2M_BASE 0x80000000
44 /* Common peripherals relative to CS7. */
45 #define V2M_AACI (V2M_PA_CS3 + V2M_PERIPH_OFFSET(4))
46 #define V2M_MMCI (V2M_PA_CS3 + V2M_PERIPH_OFFSET(5))
47 #define V2M_KMI0 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(6))
48 #define V2M_KMI1 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(7))
50 #ifdef CONFIG_TARGET_VEXPRESS64_JUNO
51 #define V2M_UART0 0x7ff80000
52 #define V2M_UART1 0x7ff70000
54 #define V2M_UART0 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(9))
55 #define V2M_UART1 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(10))
56 #define V2M_UART2 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(11))
57 #define V2M_UART3 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(12))
60 #define V2M_WDT (V2M_PA_CS3 + V2M_PERIPH_OFFSET(15))
62 #define V2M_TIMER01 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(17))
63 #define V2M_TIMER23 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(18))
65 #define V2M_SERIAL_BUS_DVI (V2M_PA_CS3 + V2M_PERIPH_OFFSET(22))
66 #define V2M_RTC (V2M_PA_CS3 + V2M_PERIPH_OFFSET(23))
68 #define V2M_CF (V2M_PA_CS3 + V2M_PERIPH_OFFSET(26))
70 #define V2M_CLCD (V2M_PA_CS3 + V2M_PERIPH_OFFSET(31))
72 /* System register offsets. */
73 #define V2M_SYS_CFGDATA (V2M_SYSREGS + 0x0a0)
74 #define V2M_SYS_CFGCTRL (V2M_SYSREGS + 0x0a4)
75 #define V2M_SYS_CFGSTAT (V2M_SYSREGS + 0x0a8)
77 /* Generic Timer Definitions */
78 #define COUNTER_FREQUENCY (0x1800000) /* 24MHz */
80 /* Generic Interrupt Controller Definitions */
82 #define GICD_BASE (0x2f000000)
83 #define GICR_BASE (0x2f100000)
86 #if defined(CONFIG_TARGET_VEXPRESS64_BASE_FVP) || \
87 defined(CONFIG_TARGET_VEXPRESS64_BASE_FVP_DRAM)
88 #define GICD_BASE (0x2f000000)
89 #define GICC_BASE (0x2c000000)
90 #elif CONFIG_TARGET_VEXPRESS64_JUNO
91 #define GICD_BASE (0x2C010000)
92 #define GICC_BASE (0x2C02f000)
94 #endif /* !CONFIG_GICV3 */
96 /* Size of malloc() pool */
97 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (8 << 20))
99 #ifndef CONFIG_TARGET_VEXPRESS64_JUNO
100 /* The Vexpress64 simulators use SMSC91C111 */
101 #define CONFIG_SMC91111 1
102 #define CONFIG_SMC91111_BASE (0x01A000000)
105 /* PL011 Serial Configuration */
106 #ifdef CONFIG_TARGET_VEXPRESS64_JUNO
107 #define CONFIG_PL011_CLOCK 7273800
109 #define CONFIG_PL011_CLOCK 24000000
113 #define CONFIG_BOOTP_BOOTFILESIZE
115 /* Miscellaneous configurable options */
116 #define CONFIG_SYS_LOAD_ADDR (V2M_BASE + 0x10000000)
118 /* Physical Memory Map */
119 #define PHYS_SDRAM_1 (V2M_BASE) /* SDRAM Bank #1 */
120 /* Top 16MB reserved for secure world use */
121 #define DRAM_SEC_SIZE 0x01000000
122 #define PHYS_SDRAM_1_SIZE 0x80000000 - DRAM_SEC_SIZE
123 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
125 #ifdef CONFIG_TARGET_VEXPRESS64_JUNO
126 #define PHYS_SDRAM_2 (0x880000000)
127 #define PHYS_SDRAM_2_SIZE 0x180000000
131 #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM_1
132 #define CONFIG_SYS_MEMTEST_END (PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE)
134 /* Initial environment variables */
135 #ifdef CONFIG_TARGET_VEXPRESS64_JUNO
137 * Defines where the kernel and FDT exist in NOR flash and where it will
138 * be copied into DRAM
140 #define CONFIG_EXTRA_ENV_SETTINGS \
141 "kernel_name=norkern\0" \
142 "kernel_alt_name=Image\0" \
143 "kernel_addr=0x80080000\0" \
144 "initrd_name=ramdisk.img\0" \
145 "initrd_addr=0x84000000\0" \
146 "fdtfile=board.dtb\0" \
147 "fdt_alt_name=juno\0" \
148 "fdt_addr=0x83000000\0" \
149 "fdt_high=0xffffffffffffffff\0" \
150 "initrd_high=0xffffffffffffffff\0" \
152 /* Copy the kernel and FDT to DRAM memory and boot */
153 #define CONFIG_BOOTCOMMAND "afs load ${kernel_name} ${kernel_addr} ; " \
154 "if test $? -eq 1; then "\
155 " echo Loading ${kernel_alt_name} instead of "\
157 " afs load ${kernel_alt_name} ${kernel_addr};"\
159 "afs load ${fdtfile} ${fdt_addr} ; " \
160 "if test $? -eq 1; then "\
161 " echo Loading ${fdt_alt_name} instead of "\
163 " afs load ${fdt_alt_name} ${fdt_addr}; "\
165 "fdt addr ${fdt_addr}; fdt resize; " \
166 "if afs load ${initrd_name} ${initrd_addr} ; "\
168 " setenv initrd_param ${initrd_addr}; "\
169 " else setenv initrd_param -; "\
171 "booti ${kernel_addr} ${initrd_param} ${fdt_addr}"
174 #elif CONFIG_TARGET_VEXPRESS64_BASE_FVP
175 #define CONFIG_EXTRA_ENV_SETTINGS \
176 "kernel_name=Image\0" \
177 "kernel_addr=0x80080000\0" \
178 "initrd_name=ramdisk.img\0" \
179 "initrd_addr=0x88000000\0" \
180 "fdtfile=devtree.dtb\0" \
181 "fdt_addr=0x83000000\0" \
182 "fdt_high=0xffffffffffffffff\0" \
183 "initrd_high=0xffffffffffffffff\0"
185 #define CONFIG_BOOTCOMMAND "smhload ${kernel_name} ${kernel_addr}; " \
186 "smhload ${fdtfile} ${fdt_addr}; " \
187 "smhload ${initrd_name} ${initrd_addr} "\
189 "fdt addr ${fdt_addr}; fdt resize; " \
190 "fdt chosen ${initrd_addr} ${initrd_end}; " \
191 "booti $kernel_addr - $fdt_addr"
194 #elif CONFIG_TARGET_VEXPRESS64_BASE_FVP_DRAM
195 #define CONFIG_EXTRA_ENV_SETTINGS \
196 "kernel_addr=0x80080000\0" \
197 "initrd_addr=0x84000000\0" \
198 "fdt_addr=0x83000000\0" \
199 "fdt_high=0xffffffffffffffff\0" \
200 "initrd_high=0xffffffffffffffff\0"
202 #define CONFIG_BOOTCOMMAND "booti $kernel_addr $initrd_addr $fdt_addr"
207 /* Monitor Command Prompt */
208 #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
209 #define CONFIG_SYS_MAXARGS 64 /* max command args */
211 #ifdef CONFIG_TARGET_VEXPRESS64_JUNO
212 #define CONFIG_SYS_FLASH_BASE 0x08000000
213 /* 255 x 256KiB sectors + 4 x 64KiB sectors at the end = 259 */
214 #define CONFIG_SYS_MAX_FLASH_SECT 259
215 /* Store environment at top of flash in the same location as blank.img */
216 /* in the Juno firmware. */
217 #define CONFIG_ENV_ADDR 0x0BFC0000
218 #define CONFIG_ENV_SECT_SIZE 0x00010000
220 #define CONFIG_SYS_FLASH_BASE 0x0C000000
221 /* 256 x 256KiB sectors */
222 #define CONFIG_SYS_MAX_FLASH_SECT 256
223 /* Store environment at top of flash */
224 #define CONFIG_ENV_ADDR 0x0FFC0000
225 #define CONFIG_ENV_SECT_SIZE 0x00040000
228 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_32BIT
229 #define CONFIG_SYS_MAX_FLASH_BANKS 1
231 #define CONFIG_SYS_FLASH_EMPTY_INFO /* flinfo indicates empty blocks */
232 #define FLASH_MAX_SECTOR_SIZE 0x00040000
233 #define CONFIG_ENV_SIZE CONFIG_ENV_SECT_SIZE
235 #endif /* __VEXPRESS_AEMV8A_H */