Merge branch 'master' of git://git.denx.de/u-boot-socfpga
[platform/kernel/u-boot.git] / include / configs / vexpress_aemv8a.h
1 /*
2  * Configuration for Versatile Express. Parts were derived from other ARM
3  *   configurations.
4  *
5  * SPDX-License-Identifier:     GPL-2.0+
6  */
7
8 #ifndef __VEXPRESS_AEMV8A_H
9 #define __VEXPRESS_AEMV8A_H
10
11 #ifdef CONFIG_TARGET_VEXPRESS64_BASE_FVP
12 #ifndef CONFIG_SEMIHOSTING
13 #error CONFIG_TARGET_VEXPRESS64_BASE_FVP requires CONFIG_SEMIHOSTING
14 #endif
15 #define CONFIG_ARMV8_SWITCH_TO_EL1
16 #endif
17
18 #define CONFIG_REMAKE_ELF
19
20 #define CONFIG_SUPPORT_RAW_INITRD
21
22 /* MMU Definitions */
23 #define CONFIG_SYS_CACHELINE_SIZE       64
24
25 #define CONFIG_IDENT_STRING             " vexpress_aemv8a"
26
27 /* Link Definitions */
28 #if defined(CONFIG_TARGET_VEXPRESS64_BASE_FVP) || \
29         defined(CONFIG_TARGET_VEXPRESS64_BASE_FVP_DRAM)
30 /* ATF loads u-boot here for BASE_FVP model */
31 #define CONFIG_SYS_TEXT_BASE            0x88000000
32 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_SDRAM_BASE + 0x03f00000)
33 #elif CONFIG_TARGET_VEXPRESS64_JUNO
34 #define CONFIG_SYS_TEXT_BASE            0xe0000000
35 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
36 #endif
37
38 #define CONFIG_SYS_BOOTM_LEN (64 << 20)      /* Increase max gunzip size */
39
40 /* CS register bases for the original memory map. */
41 #define V2M_PA_CS0                      0x00000000
42 #define V2M_PA_CS1                      0x14000000
43 #define V2M_PA_CS2                      0x18000000
44 #define V2M_PA_CS3                      0x1c000000
45 #define V2M_PA_CS4                      0x0c000000
46 #define V2M_PA_CS5                      0x10000000
47
48 #define V2M_PERIPH_OFFSET(x)            (x << 16)
49 #define V2M_SYSREGS                     (V2M_PA_CS3 + V2M_PERIPH_OFFSET(1))
50 #define V2M_SYSCTL                      (V2M_PA_CS3 + V2M_PERIPH_OFFSET(2))
51 #define V2M_SERIAL_BUS_PCI              (V2M_PA_CS3 + V2M_PERIPH_OFFSET(3))
52
53 #define V2M_BASE                        0x80000000
54
55 /* Common peripherals relative to CS7. */
56 #define V2M_AACI                        (V2M_PA_CS3 + V2M_PERIPH_OFFSET(4))
57 #define V2M_MMCI                        (V2M_PA_CS3 + V2M_PERIPH_OFFSET(5))
58 #define V2M_KMI0                        (V2M_PA_CS3 + V2M_PERIPH_OFFSET(6))
59 #define V2M_KMI1                        (V2M_PA_CS3 + V2M_PERIPH_OFFSET(7))
60
61 #ifdef CONFIG_TARGET_VEXPRESS64_JUNO
62 #define V2M_UART0                       0x7ff80000
63 #define V2M_UART1                       0x7ff70000
64 #else /* Not Juno */
65 #define V2M_UART0                       (V2M_PA_CS3 + V2M_PERIPH_OFFSET(9))
66 #define V2M_UART1                       (V2M_PA_CS3 + V2M_PERIPH_OFFSET(10))
67 #define V2M_UART2                       (V2M_PA_CS3 + V2M_PERIPH_OFFSET(11))
68 #define V2M_UART3                       (V2M_PA_CS3 + V2M_PERIPH_OFFSET(12))
69 #endif
70
71 #define V2M_WDT                         (V2M_PA_CS3 + V2M_PERIPH_OFFSET(15))
72
73 #define V2M_TIMER01                     (V2M_PA_CS3 + V2M_PERIPH_OFFSET(17))
74 #define V2M_TIMER23                     (V2M_PA_CS3 + V2M_PERIPH_OFFSET(18))
75
76 #define V2M_SERIAL_BUS_DVI              (V2M_PA_CS3 + V2M_PERIPH_OFFSET(22))
77 #define V2M_RTC                         (V2M_PA_CS3 + V2M_PERIPH_OFFSET(23))
78
79 #define V2M_CF                          (V2M_PA_CS3 + V2M_PERIPH_OFFSET(26))
80
81 #define V2M_CLCD                        (V2M_PA_CS3 + V2M_PERIPH_OFFSET(31))
82
83 /* System register offsets. */
84 #define V2M_SYS_CFGDATA                 (V2M_SYSREGS + 0x0a0)
85 #define V2M_SYS_CFGCTRL                 (V2M_SYSREGS + 0x0a4)
86 #define V2M_SYS_CFGSTAT                 (V2M_SYSREGS + 0x0a8)
87
88 /* Generic Timer Definitions */
89 #define COUNTER_FREQUENCY               (0x1800000)     /* 24MHz */
90
91 /* Generic Interrupt Controller Definitions */
92 #ifdef CONFIG_GICV3
93 #define GICD_BASE                       (0x2f000000)
94 #define GICR_BASE                       (0x2f100000)
95 #else
96
97 #if defined(CONFIG_TARGET_VEXPRESS64_BASE_FVP) || \
98         defined(CONFIG_TARGET_VEXPRESS64_BASE_FVP_DRAM)
99 #define GICD_BASE                       (0x2f000000)
100 #define GICC_BASE                       (0x2c000000)
101 #elif CONFIG_TARGET_VEXPRESS64_JUNO
102 #define GICD_BASE                       (0x2C010000)
103 #define GICC_BASE                       (0x2C02f000)
104 #endif
105 #endif /* !CONFIG_GICV3 */
106
107 /* Size of malloc() pool */
108 #define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + (8 << 20))
109
110 /* Ethernet Configuration */
111 #ifdef CONFIG_TARGET_VEXPRESS64_JUNO
112 /* The real hardware Versatile express uses SMSC9118 */
113 #define CONFIG_SMC911X                  1
114 #define CONFIG_SMC911X_32_BIT           1
115 #define CONFIG_SMC911X_BASE             (0x018000000)
116 #else
117 /* The Vexpress64 simulators use SMSC91C111 */
118 #define CONFIG_SMC91111                 1
119 #define CONFIG_SMC91111_BASE            (0x01A000000)
120 #endif
121
122 /* PL011 Serial Configuration */
123 #define CONFIG_BAUDRATE                 115200
124 #define CONFIG_CONS_INDEX               0
125 #define CONFIG_PL01X_SERIAL
126 #define CONFIG_PL011_SERIAL
127 #ifdef CONFIG_TARGET_VEXPRESS64_JUNO
128 #define CONFIG_PL011_CLOCK              7273800
129 #else
130 #define CONFIG_PL011_CLOCK              24000000
131 #endif
132
133 /* Command line configuration */
134 #define CONFIG_MENU
135 /*#define CONFIG_MENU_SHOW*/
136 #define CONFIG_CMD_BOOTI
137 #define CONFIG_CMD_UNZIP
138 #define CONFIG_CMD_PXE
139 #define CONFIG_CMD_ENV
140 #define CONFIG_DOS_PARTITION
141
142 /* BOOTP options */
143 #define CONFIG_BOOTP_BOOTFILESIZE
144 #define CONFIG_BOOTP_BOOTPATH
145 #define CONFIG_BOOTP_GATEWAY
146 #define CONFIG_BOOTP_HOSTNAME
147 #define CONFIG_BOOTP_PXE
148
149 /* Miscellaneous configurable options */
150 #define CONFIG_SYS_LOAD_ADDR            (V2M_BASE + 0x10000000)
151
152 /* Physical Memory Map */
153 #define PHYS_SDRAM_1                    (V2M_BASE)      /* SDRAM Bank #1 */
154 /* Top 16MB reserved for secure world use */
155 #define DRAM_SEC_SIZE           0x01000000
156 #define PHYS_SDRAM_1_SIZE       0x80000000 - DRAM_SEC_SIZE
157 #define CONFIG_SYS_SDRAM_BASE   PHYS_SDRAM_1
158
159 #ifdef CONFIG_TARGET_VEXPRESS64_JUNO
160 #define CONFIG_NR_DRAM_BANKS            2
161 #define PHYS_SDRAM_2                    (0x880000000)
162 #define PHYS_SDRAM_2_SIZE               0x180000000
163 #else
164 #define CONFIG_NR_DRAM_BANKS            1
165 #endif
166
167 /* Enable memtest */
168 #define CONFIG_SYS_MEMTEST_START        PHYS_SDRAM_1
169 #define CONFIG_SYS_MEMTEST_END          (PHYS_SDRAM_1 + PHYS_SDRAM_1_SIZE)
170
171 /* Initial environment variables */
172 #ifdef CONFIG_TARGET_VEXPRESS64_JUNO
173 /*
174  * Defines where the kernel and FDT exist in NOR flash and where it will
175  * be copied into DRAM
176  */
177 #define CONFIG_EXTRA_ENV_SETTINGS       \
178                                 "kernel_name=norkern\0" \
179                                 "kernel_alt_name=Image\0"       \
180                                 "kernel_addr=0x80080000\0" \
181                                 "initrd_name=ramdisk.img\0"     \
182                                 "initrd_addr=0x84000000\0"      \
183                                 "fdtfile=board.dtb\0" \
184                                 "fdt_alt_name=juno\0" \
185                                 "fdt_addr=0x83000000\0" \
186                                 "fdt_high=0xffffffffffffffff\0" \
187                                 "initrd_high=0xffffffffffffffff\0" \
188
189 /* Assume we boot with root on the first partition of a USB stick */
190 #define CONFIG_BOOTARGS         "console=ttyAMA0,115200n8 " \
191                                 "root=/dev/sda2 rw " \
192                                 "rootwait "\
193                                 "earlyprintk=pl011,0x7ff80000 debug "\
194                                 "user_debug=31 "\
195                                 "androidboot.hardware=juno "\
196                                 "loglevel=9"
197
198 /* Copy the kernel and FDT to DRAM memory and boot */
199 #define CONFIG_BOOTCOMMAND      "afs load ${kernel_name} ${kernel_addr} ; " \
200                                 "if test $? -eq 1; then "\
201                                 "  echo Loading ${kernel_alt_name} instead of "\
202                                 "${kernel_name}; "\
203                                 "  afs load ${kernel_alt_name} ${kernel_addr};"\
204                                 "fi ; "\
205                                 "afs load  ${fdtfile} ${fdt_addr} ; " \
206                                 "if test $? -eq 1; then "\
207                                 "  echo Loading ${fdt_alt_name} instead of "\
208                                 "${fdtfile}; "\
209                                 "  afs load ${fdt_alt_name} ${fdt_addr}; "\
210                                 "fi ; "\
211                                 "fdt addr ${fdt_addr}; fdt resize; " \
212                                 "if afs load  ${initrd_name} ${initrd_addr} ; "\
213                                 "then "\
214                                 "  setenv initrd_param ${initrd_addr}; "\
215                                 "  else setenv initrd_param -; "\
216                                 "fi ; " \
217                                 "booti ${kernel_addr} ${initrd_param} ${fdt_addr}"
218
219
220 #elif CONFIG_TARGET_VEXPRESS64_BASE_FVP
221 #define CONFIG_EXTRA_ENV_SETTINGS       \
222                                 "kernel_name=Image\0"           \
223                                 "kernel_addr=0x80080000\0"      \
224                                 "initrd_name=ramdisk.img\0"     \
225                                 "initrd_addr=0x88000000\0"      \
226                                 "fdtfile=devtree.dtb\0"         \
227                                 "fdt_addr=0x83000000\0"         \
228                                 "fdt_high=0xffffffffffffffff\0" \
229                                 "initrd_high=0xffffffffffffffff\0"
230
231 #define CONFIG_BOOTARGS         "console=ttyAMA0 earlyprintk=pl011,"\
232                                 "0x1c090000 debug user_debug=31 "\
233                                 "loglevel=9"
234
235 #define CONFIG_BOOTCOMMAND      "smhload ${kernel_name} ${kernel_addr}; " \
236                                 "smhload ${fdtfile} ${fdt_addr}; " \
237                                 "smhload ${initrd_name} ${initrd_addr} "\
238                                 "initrd_end; " \
239                                 "fdt addr ${fdt_addr}; fdt resize; " \
240                                 "fdt chosen ${initrd_addr} ${initrd_end}; " \
241                                 "booti $kernel_addr - $fdt_addr"
242
243
244 #elif CONFIG_TARGET_VEXPRESS64_BASE_FVP_DRAM
245 #define CONFIG_EXTRA_ENV_SETTINGS       \
246                                 "kernel_addr=0x80080000\0"      \
247                                 "initrd_addr=0x84000000\0"      \
248                                 "fdt_addr=0x83000000\0"         \
249                                 "fdt_high=0xffffffffffffffff\0" \
250                                 "initrd_high=0xffffffffffffffff\0"
251
252 #define CONFIG_BOOTARGS         "console=ttyAMA0 earlyprintk=pl011,"\
253                                 "0x1c090000 debug user_debug=31 "\
254                                 "androidboot.hardware=fvpbase "\
255                                 "root=/dev/vda2 rw "\
256                                 "rootwait "\
257                                 "loglevel=9"
258
259 #define CONFIG_BOOTCOMMAND      "booti $kernel_addr $initrd_addr $fdt_addr"
260
261
262 #endif
263
264 /* Monitor Command Prompt */
265 #define CONFIG_SYS_CBSIZE               512     /* Console I/O Buffer Size */
266 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
267                                         sizeof(CONFIG_SYS_PROMPT) + 16)
268 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE
269 #define CONFIG_SYS_LONGHELP
270 #define CONFIG_CMDLINE_EDITING
271 #define CONFIG_SYS_MAXARGS              64      /* max command args */
272
273 #ifdef CONFIG_TARGET_VEXPRESS64_JUNO
274 #define CONFIG_SYS_FLASH_BASE           0x08000000
275 /* 255 x 256KiB sectors + 4 x 64KiB sectors at the end = 259 */
276 #define CONFIG_SYS_MAX_FLASH_SECT       259
277 /* Store environment at top of flash in the same location as blank.img */
278 /* in the Juno firmware. */
279 #define CONFIG_ENV_ADDR                 0x0BFC0000
280 #define CONFIG_ENV_SECT_SIZE            0x00010000
281 #else
282 #define CONFIG_SYS_FLASH_BASE           0x0C000000
283 /* 256 x 256KiB sectors */
284 #define CONFIG_SYS_MAX_FLASH_SECT       256
285 /* Store environment at top of flash */
286 #define CONFIG_ENV_ADDR                 0x0FFC0000
287 #define CONFIG_ENV_SECT_SIZE            0x00040000
288 #endif
289
290 #define CONFIG_SYS_FLASH_CFI            1
291 #define CONFIG_FLASH_CFI_DRIVER         1
292 #define CONFIG_SYS_FLASH_CFI_WIDTH      FLASH_CFI_32BIT
293 #define CONFIG_SYS_MAX_FLASH_BANKS      1
294
295 #define CONFIG_SYS_FLASH_USE_BUFFER_WRITE /* use buffered writes */
296 #define CONFIG_SYS_FLASH_PROTECTION     /* The devices have real protection */
297 #define CONFIG_SYS_FLASH_EMPTY_INFO     /* flinfo indicates empty blocks */
298 #define FLASH_MAX_SECTOR_SIZE           0x00040000
299 #define CONFIG_ENV_SIZE                 CONFIG_ENV_SECT_SIZE
300 #define CONFIG_ENV_IS_IN_FLASH          1
301
302 #endif /* __VEXPRESS_AEMV8A_H */