1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Configuration for Versatile Express. Parts were derived from other ARM
7 #ifndef __VEXPRESS_AEMV8_H
8 #define __VEXPRESS_AEMV8_H
10 #include <linux/stringify.h>
12 /* Link Definitions */
13 #ifdef CONFIG_TARGET_VEXPRESS64_JUNO
15 /* ATF loads u-boot here for BASE_FVP model */
18 #define CONFIG_SYS_BOOTM_LEN (64 << 20) /* Increase max gunzip size */
20 /* CS register bases for the original memory map. */
21 #ifdef CONFIG_TARGET_VEXPRESS64_BASER_FVP
22 #define V2M_DRAM_BASE 0x00000000
23 #define V2M_PA_BASE 0x80000000
25 #define V2M_DRAM_BASE 0x80000000
26 #define V2M_PA_BASE 0x00000000
29 #define V2M_PA_CS0 (V2M_PA_BASE + 0x00000000)
30 #define V2M_PA_CS1 (V2M_PA_BASE + 0x14000000)
31 #define V2M_PA_CS2 (V2M_PA_BASE + 0x18000000)
32 #define V2M_PA_CS3 (V2M_PA_BASE + 0x1c000000)
33 #define V2M_PA_CS4 (V2M_PA_BASE + 0x0c000000)
34 #define V2M_PA_CS5 (V2M_PA_BASE + 0x10000000)
36 #define V2M_PERIPH_OFFSET(x) (x << 16)
37 #define V2M_SYSREGS (V2M_PA_CS3 + V2M_PERIPH_OFFSET(1))
38 #define V2M_SYSCTL (V2M_PA_CS3 + V2M_PERIPH_OFFSET(2))
39 #define V2M_SERIAL_BUS_PCI (V2M_PA_CS3 + V2M_PERIPH_OFFSET(3))
41 /* Common peripherals relative to CS7. */
42 #define V2M_AACI (V2M_PA_CS3 + V2M_PERIPH_OFFSET(4))
43 #define V2M_MMCI (V2M_PA_CS3 + V2M_PERIPH_OFFSET(5))
44 #define V2M_KMI0 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(6))
45 #define V2M_KMI1 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(7))
47 #ifdef CONFIG_TARGET_VEXPRESS64_JUNO
48 #define V2M_UART0 0x7ff80000
49 #define V2M_UART1 0x7ff70000
51 #define V2M_UART0 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(9))
52 #define V2M_UART1 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(10))
53 #define V2M_UART2 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(11))
54 #define V2M_UART3 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(12))
57 #define V2M_WDT (V2M_PA_CS3 + V2M_PERIPH_OFFSET(15))
59 #define V2M_TIMER01 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(17))
60 #define V2M_TIMER23 (V2M_PA_CS3 + V2M_PERIPH_OFFSET(18))
62 #define V2M_SERIAL_BUS_DVI (V2M_PA_CS3 + V2M_PERIPH_OFFSET(22))
63 #define V2M_RTC (V2M_PA_CS3 + V2M_PERIPH_OFFSET(23))
65 #define V2M_CF (V2M_PA_CS3 + V2M_PERIPH_OFFSET(26))
67 #define V2M_CLCD (V2M_PA_CS3 + V2M_PERIPH_OFFSET(31))
69 /* System register offsets. */
70 #define V2M_SYS_CFGDATA (V2M_SYSREGS + 0x0a0)
71 #define V2M_SYS_CFGCTRL (V2M_SYSREGS + 0x0a4)
72 #define V2M_SYS_CFGSTAT (V2M_SYSREGS + 0x0a8)
74 /* Generic Interrupt Controller Definitions */
76 #define GICD_BASE (V2M_PA_BASE + 0x2f000000)
77 #define GICR_BASE (V2M_PA_BASE + 0x2f100000)
80 #ifdef CONFIG_TARGET_VEXPRESS64_JUNO
81 #define GICD_BASE (0x2C010000)
82 #define GICC_BASE (0x2C02f000)
84 #define GICD_BASE (V2M_PA_BASE + 0x2f000000)
85 #define GICC_BASE (V2M_PA_BASE + 0x2c000000)
87 #endif /* !CONFIG_GICV3 */
89 #if defined(CONFIG_TARGET_VEXPRESS64_BASE_FVP) && !defined(CONFIG_DM_ETH)
90 /* The Vexpress64 BASE_FVP simulator uses SMSC91C111 */
91 #define CONFIG_SMC91111 1
92 #define CONFIG_SMC91111_BASE (V2M_PA_BASE + 0x01A000000)
95 /* PL011 Serial Configuration */
96 #ifdef CONFIG_TARGET_VEXPRESS64_JUNO
97 #define CONFIG_PL011_CLOCK 7372800
99 #define CONFIG_PL011_CLOCK 24000000
102 /* Physical Memory Map */
103 #define PHYS_SDRAM_1 (V2M_DRAM_BASE) /* SDRAM Bank #1 */
104 /* Top 16MB reserved for secure world use */
105 #define DRAM_SEC_SIZE 0x01000000
106 #define PHYS_SDRAM_1_SIZE 0x80000000 - DRAM_SEC_SIZE
107 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
109 #ifdef CONFIG_TARGET_VEXPRESS64_JUNO
110 #define PHYS_SDRAM_2 (0x880000000)
111 #define PHYS_SDRAM_2_SIZE 0x180000000
112 #elif CONFIG_NR_DRAM_BANKS == 2
113 #define PHYS_SDRAM_2 (0x880000000)
114 #define PHYS_SDRAM_2_SIZE 0x80000000
117 /* Copy the kernel, initrd and FDT from NOR flash to DRAM memory and boot. */
118 #define BOOTENV_DEV_AFS(devtypeu, devtypel, instance) \
120 "afs load ${kernel_name} ${kernel_addr_r} ;"\
121 "if test $? -eq 1; then "\
122 " echo Loading ${kernel_alt_name} instead of ${kernel_name}; "\
123 " afs load ${kernel_alt_name} ${kernel_addr_r};"\
125 "afs load ${fdtfile} ${fdt_addr_r} ;"\
126 "if test $? -eq 1; then "\
127 " echo Loading ${fdt_alt_name} instead of ${fdtfile}; "\
128 " afs load ${fdt_alt_name} ${fdt_addr_r}; "\
130 "fdt addr ${fdt_addr_r}; fdt resize; " \
131 "if afs load ${ramdisk_name} ${ramdisk_addr_r} ; "\
133 " setenv ramdisk_param ${ramdisk_addr_r}; "\
135 " setenv ramdisk_param -; "\
137 "booti ${kernel_addr_r} ${ramdisk_param} ${fdt_addr_r}\0"
138 #define BOOTENV_DEV_NAME_AFS(devtypeu, devtypel, instance) "afs "
140 /* Boot by executing a U-Boot script pre-loaded into DRAM. */
141 #define BOOTENV_DEV_MEM(devtypeu, devtypel, instance) \
143 "source ${scriptaddr}; " \
144 "if test $? -eq 1; then " \
145 " env import -t ${scriptaddr}; " \
146 " if test -n $uenvcmd; then " \
147 " echo Running uenvcmd ...; " \
151 #define BOOTENV_DEV_NAME_MEM(devtypeu, devtypel, instance) "mem "
153 #ifdef CONFIG_CMD_VIRTIO
154 #define FUNC_VIRTIO(func) func(VIRTIO, virtio, 0)
156 #define FUNC_VIRTIO(func)
160 * Boot by loading an Android image, or kernel, initrd and FDT through
161 * semihosting into DRAM.
163 #define BOOTENV_DEV_SMH(devtypeu, devtypel, instance) \
165 "if load hostfs - ${boot_addr_r} ${boot_name}; then" \
166 " setenv bootargs;" \
167 " abootimg addr ${boot_addr_r};" \
168 " abootimg get dtb --index=0 fdt_addr_r;" \
169 " bootm ${boot_addr_r} ${boot_addr_r} ${fdt_addr_r};" \
171 " if load hostfs - ${kernel_addr_r} ${kernel_name}; then" \
172 " setenv fdt_high 0xffffffffffffffff;" \
173 " setenv initrd_high 0xffffffffffffffff;" \
174 " load hostfs - ${fdt_addr_r} ${fdtfile};" \
175 " load hostfs - ${ramdisk_addr_r} ${ramdisk_name};" \
176 " fdt addr ${fdt_addr_r};" \
178 " fdt chosen ${ramdisk_addr_r} ${filesize};" \
179 " booti $kernel_addr_r - $fdt_addr_r;" \
182 #define BOOTENV_DEV_NAME_SMH(devtypeu, devtypel, instance) "smh "
184 /* Boot sources for distro boot and load addresses, per board */
186 #ifdef CONFIG_TARGET_VEXPRESS64_JUNO /* Arm Juno board */
188 #define BOOT_TARGET_DEVICES(func) \
190 func(SATA, sata, 0) \
191 func(SATA, sata, 1) \
193 func(DHCP, dhcp, na) \
196 #define VEXPRESS_KERNEL_ADDR 0x80080000
197 #define VEXPRESS_PXEFILE_ADDR 0x8fb00000
198 #define VEXPRESS_FDT_ADDR 0x8fc00000
199 #define VEXPRESS_SCRIPT_ADDR 0x8fd00000
200 #define VEXPRESS_RAMDISK_ADDR 0x8fe00000
202 #define EXTRA_ENV_NAMES \
203 "kernel_name=norkern\0" \
204 "kernel_alt_name=Image\0" \
205 "ramdisk_name=ramdisk.img\0" \
206 "fdtfile=board.dtb\0" \
207 "fdt_alt_name=juno\0"
209 #elif CONFIG_TARGET_VEXPRESS64_BASE_FVP /* ARMv8-A base model */
211 #define BOOT_TARGET_DEVICES(func) \
218 #define VEXPRESS_KERNEL_ADDR 0x80080000
219 #define VEXPRESS_PXEFILE_ADDR 0x8fa00000
220 #define VEXPRESS_SCRIPT_ADDR 0x8fb00000
221 #define VEXPRESS_FDT_ADDR 0x8fc00000
222 #define VEXPRESS_BOOT_ADDR 0x8fd00000
223 #define VEXPRESS_RAMDISK_ADDR 0x8fe00000
225 #define EXTRA_ENV_NAMES \
226 "kernel_name=Image\0" \
227 "ramdisk_name=ramdisk.img\0" \
228 "fdtfile=devtree.dtb\0" \
229 "boot_name=boot.img\0" \
230 "boot_addr_r=" __stringify(VEXPRESS_BOOT_ADDR) "\0"
232 #elif CONFIG_TARGET_VEXPRESS64_BASER_FVP /* ARMv8-R base model */
234 #define BOOT_TARGET_DEVICES(func) \
240 #define VEXPRESS_KERNEL_ADDR 0x00200000
241 #define VEXPRESS_PXEFILE_ADDR 0x0fb00000
242 #define VEXPRESS_FDT_ADDR 0x0fc00000
243 #define VEXPRESS_SCRIPT_ADDR 0x0fd00000
244 #define VEXPRESS_RAMDISK_ADDR 0x0fe00000
246 #define EXTRA_ENV_NAMES \
247 "kernel_name=Image\0" \
248 "ramdisk_name=ramdisk.img\0" \
249 "fdtfile=board.dtb\0"
252 #include <config_distro_bootcmd.h>
254 /* Default load addresses and names for the different payloads. */
255 #define CONFIG_EXTRA_ENV_SETTINGS \
256 "kernel_addr_r=" __stringify(VEXPRESS_KERNEL_ADDR) "\0" \
257 "ramdisk_addr_r=" __stringify(VEXPRESS_RAMDISK_ADDR) "\0" \
258 "pxefile_addr_r=" __stringify(VEXPRESS_PXEFILE_ADDR) "\0" \
259 "fdt_addr_r=" __stringify(VEXPRESS_FDT_ADDR) "\0" \
260 "scriptaddr=" __stringify(VEXPRESS_SCRIPT_ADDR) "\0" \
264 #ifdef CONFIG_TARGET_VEXPRESS64_JUNO
265 #define CONFIG_SYS_FLASH_BASE 0x08000000
266 /* 255 x 256KiB sectors + 4 x 64KiB sectors at the end = 259 */
267 #define CONFIG_SYS_MAX_FLASH_SECT 259
268 /* Store environment at top of flash in the same location as blank.img */
269 /* in the Juno firmware. */
271 #define CONFIG_SYS_FLASH_BASE (V2M_PA_BASE + 0x0C000000)
272 /* 256 x 256KiB sectors */
273 #define CONFIG_SYS_MAX_FLASH_SECT 256
274 /* Store environment at top of flash */
277 #ifdef CONFIG_USB_EHCI_HCD
278 #define CONFIG_USB_OHCI_NEW
279 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1
282 #define CONFIG_SYS_FLASH_EMPTY_INFO /* flinfo indicates empty blocks */
283 #define FLASH_MAX_SECTOR_SIZE 0x00040000
285 #endif /* __VEXPRESS_AEMV8_H */