include/configs/vexpress_aemv8.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * Configuration for Versatile Express. Parts were derived from other ARM
   4  *   configurations.
   5  */
   6
   7 #ifndef __VEXPRESS_AEMV8_H
   8 #define __VEXPRESS_AEMV8_H
   9
  10 #include <linux/stringify.h>
  11
  12 #define CONFIG_REMAKE_ELF
  13
  14 /* Link Definitions */
  15 #ifdef CONFIG_TARGET_VEXPRESS64_JUNO
  16 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_SDRAM_BASE + 0x7fff0)
  17 #else
  18 /* ATF loads u-boot here for BASE_FVP model */
  19 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_SDRAM_BASE + 0x03f00000)
  20 #endif
  21
  22 #define CONFIG_SYS_BOOTM_LEN (64 << 20)      /* Increase max gunzip size */
  23
  24 /* CS register bases for the original memory map. */
  25 #define V2M_BASE                        0x80000000
  26 #define V2M_PA_BASE                     0x00000000
  27
  28 #define V2M_PA_CS0                      (V2M_PA_BASE + 0x00000000)
  29 #define V2M_PA_CS1                      (V2M_PA_BASE + 0x14000000)
  30 #define V2M_PA_CS2                      (V2M_PA_BASE + 0x18000000)
  31 #define V2M_PA_CS3                      (V2M_PA_BASE + 0x1c000000)
  32 #define V2M_PA_CS4                      (V2M_PA_BASE + 0x0c000000)
  33 #define V2M_PA_CS5                      (V2M_PA_BASE + 0x10000000)
  34
  35 #define V2M_PERIPH_OFFSET(x)            (x << 16)
  36 #define V2M_SYSREGS                     (V2M_PA_CS3 + V2M_PERIPH_OFFSET(1))
  37 #define V2M_SYSCTL                      (V2M_PA_CS3 + V2M_PERIPH_OFFSET(2))
  38 #define V2M_SERIAL_BUS_PCI              (V2M_PA_CS3 + V2M_PERIPH_OFFSET(3))
  39
  40 /* Common peripherals relative to CS7. */
  41 #define V2M_AACI                        (V2M_PA_CS3 + V2M_PERIPH_OFFSET(4))
  42 #define V2M_MMCI                        (V2M_PA_CS3 + V2M_PERIPH_OFFSET(5))
  43 #define V2M_KMI0                        (V2M_PA_CS3 + V2M_PERIPH_OFFSET(6))
  44 #define V2M_KMI1                        (V2M_PA_CS3 + V2M_PERIPH_OFFSET(7))
  45
  46 #ifdef CONFIG_TARGET_VEXPRESS64_JUNO
  47 #define V2M_UART0                       0x7ff80000
  48 #define V2M_UART1                       0x7ff70000
  49 #else /* Not Juno */
  50 #define V2M_UART0                       (V2M_PA_CS3 + V2M_PERIPH_OFFSET(9))
  51 #define V2M_UART1                       (V2M_PA_CS3 + V2M_PERIPH_OFFSET(10))
  52 #define V2M_UART2                       (V2M_PA_CS3 + V2M_PERIPH_OFFSET(11))
  53 #define V2M_UART3                       (V2M_PA_CS3 + V2M_PERIPH_OFFSET(12))
  54 #endif
  55
  56 #define V2M_WDT                         (V2M_PA_CS3 + V2M_PERIPH_OFFSET(15))
  57
  58 #define V2M_TIMER01                     (V2M_PA_CS3 + V2M_PERIPH_OFFSET(17))
  59 #define V2M_TIMER23                     (V2M_PA_CS3 + V2M_PERIPH_OFFSET(18))
  60
  61 #define V2M_SERIAL_BUS_DVI              (V2M_PA_CS3 + V2M_PERIPH_OFFSET(22))
  62 #define V2M_RTC                         (V2M_PA_CS3 + V2M_PERIPH_OFFSET(23))
  63
  64 #define V2M_CF                          (V2M_PA_CS3 + V2M_PERIPH_OFFSET(26))
  65
  66 #define V2M_CLCD                        (V2M_PA_CS3 + V2M_PERIPH_OFFSET(31))
  67
  68 /* System register offsets. */
  69 #define V2M_SYS_CFGDATA                 (V2M_SYSREGS + 0x0a0)
  70 #define V2M_SYS_CFGCTRL                 (V2M_SYSREGS + 0x0a4)
  71 #define V2M_SYS_CFGSTAT                 (V2M_SYSREGS + 0x0a8)
  72
  73 /* Generic Timer Definitions */
  74 #define COUNTER_FREQUENCY               24000000        /* 24MHz */
  75
  76 /* Generic Interrupt Controller Definitions */
  77 #ifdef CONFIG_GICV3
  78 #define GICD_BASE                       (V2M_PA_BASE + 0x2f000000)
  79 #define GICR_BASE                       (V2M_PA_BASE + 0x2f100000)
  80 #else
  81
  82 #ifdef CONFIG_TARGET_VEXPRESS64_JUNO
  83 #define GICD_BASE                       (0x2C010000)
  84 #define GICC_BASE                       (0x2C02f000)
  85 #else
  86 #define GICD_BASE                       (V2M_PA_BASE + 0x2f000000)
  87 #define GICC_BASE                       (V2M_PA_BASE + 0x2c000000)
  88 #endif
  89 #endif /* !CONFIG_GICV3 */
  90
  91 #if defined(CONFIG_TARGET_VEXPRESS64_BASE_FVP) && !defined(CONFIG_DM_ETH)
  92 /* The Vexpress64 BASE_FVP simulator uses SMSC91C111 */
  93 #define CONFIG_SMC91111                 1
  94 #define CONFIG_SMC91111_BASE            (V2M_PA_BASE + 0x01A000000)
  95 #endif
  96
  97 /* PL011 Serial Configuration */
  98 #ifdef CONFIG_TARGET_VEXPRESS64_JUNO
  99 #define CONFIG_PL011_CLOCK              7372800
 100 #else
 101 #define CONFIG_PL011_CLOCK              24000000
 102 #endif
 103
 104 /* BOOTP options */
 105 #define CONFIG_BOOTP_BOOTFILESIZE
 106
 107 /* Miscellaneous configurable options */
 108
 109 /* Physical Memory Map */
 110 #define PHYS_SDRAM_1                    (V2M_BASE)      /* SDRAM Bank #1 */
 111 /* Top 16MB reserved for secure world use */
 112 #define DRAM_SEC_SIZE           0x01000000
 113 #define PHYS_SDRAM_1_SIZE       0x80000000 - DRAM_SEC_SIZE
 114 #define CONFIG_SYS_SDRAM_BASE   PHYS_SDRAM_1
 115
 116 #ifdef CONFIG_TARGET_VEXPRESS64_JUNO
 117 #define PHYS_SDRAM_2                    (0x880000000)
 118 #define PHYS_SDRAM_2_SIZE               0x180000000
 119 #elif CONFIG_NR_DRAM_BANKS == 2
 120 #define PHYS_SDRAM_2                    (0x880000000)
 121 #define PHYS_SDRAM_2_SIZE               0x80000000
 122 #endif
 123
 124 /* Enable memtest */
 125
 126 /* Initial environment variables */
 127 #ifdef CONFIG_TARGET_VEXPRESS64_JUNO
 128 /* Copy the kernel and FDT to DRAM memory and boot */
 129 #define BOOTENV_DEV_AFS(devtypeu, devtypel, instance) \
 130         "bootcmd_afs="                                                  \
 131                 "afs load ${kernel_name} ${kernel_addr_r} ;"\
 132                 "if test $? -eq 1; then "\
 133                 "  echo Loading ${kernel_alt_name} instead of ${kernel_name}; "\
 134                 "  afs load ${kernel_alt_name} ${kernel_addr_r};"\
 135                 "fi ; "\
 136                 "afs load ${fdtfile} ${fdt_addr_r} ;"\
 137                 "if test $? -eq 1; then "\
 138                 "  echo Loading ${fdt_alt_name} instead of ${fdtfile}; "\
 139                 "  afs load ${fdt_alt_name} ${fdt_addr_r}; "\
 140                 "fi ; "\
 141                 "fdt addr ${fdt_addr_r}; fdt resize; " \
 142                 "if afs load  ${ramdisk_name} ${ramdisk_addr_r} ; "\
 143                 "then "\
 144                 "  setenv ramdisk_param ${ramdisk_addr_r}; "\
 145                 "else "\
 146                 "  setenv ramdisk_param -; "\
 147                 "fi ; " \
 148                 "booti ${kernel_addr_r} ${ramdisk_param} ${fdt_addr_r}\0"
 149 #define BOOTENV_DEV_NAME_AFS(devtypeu, devtypel, instance) "afs "
 150
 151 #define BOOT_TARGET_DEVICES(func)       \
 152         func(USB, usb, 0)               \
 153         func(SATA, sata, 0)             \
 154         func(SATA, sata, 1)             \
 155         func(PXE, pxe, na)              \
 156         func(DHCP, dhcp, na)            \
 157         func(AFS, afs, na)
 158
 159 #include <config_distro_bootcmd.h>
 160
 161 /*
 162  * Defines where the kernel and FDT exist in NOR flash and where it will
 163  * be copied into DRAM
 164  */
 165 #define CONFIG_EXTRA_ENV_SETTINGS       \
 166                                 "kernel_name=norkern\0" \
 167                                 "kernel_alt_name=Image\0"       \
 168                                 "kernel_addr_r=0x80080000\0" \
 169                                 "ramdisk_name=ramdisk.img\0"    \
 170                                 "ramdisk_addr_r=0x88000000\0"   \
 171                                 "fdtfile=board.dtb\0" \
 172                                 "fdt_alt_name=juno\0" \
 173                                 "fdt_addr_r=0x80000000\0" \
 174                                 BOOTENV
 175
 176 #elif CONFIG_TARGET_VEXPRESS64_BASE_FVP
 177
 178 #define VEXPRESS_KERNEL_ADDR    0x80080000
 179 #define VEXPRESS_FDT_ADDR       0x8fc00000
 180 #define VEXPRESS_BOOT_ADDR      0x8fd00000
 181 #define VEXPRESS_RAMDISK_ADDR   0x8fe00000
 182
 183 #define CONFIG_EXTRA_ENV_SETTINGS       \
 184                                 "kernel_name=Image\0"           \
 185                                 "kernel_addr_r=" __stringify(VEXPRESS_KERNEL_ADDR) "\0" \
 186                                 "ramdisk_name=ramdisk.img\0"    \
 187                                 "ramdisk_addr_r=" __stringify(VEXPRESS_RAMDISK_ADDR) "\0" \
 188                                 "fdtfile=devtree.dtb\0" \
 189                                 "fdt_addr_r=" __stringify(VEXPRESS_FDT_ADDR) "\0"       \
 190                                 "boot_name=boot.img\0" \
 191                                 "boot_addr_r=" __stringify(VEXPRESS_BOOT_ADDR) "\0"
 192
 193 #endif
 194
 195 /* Monitor Command Prompt */
 196 #define CONFIG_SYS_CBSIZE               512     /* Console I/O Buffer Size */
 197 #define CONFIG_SYS_MAXARGS              64      /* max command args */
 198
 199 #ifdef CONFIG_TARGET_VEXPRESS64_JUNO
 200 #define CONFIG_SYS_FLASH_BASE           0x08000000
 201 /* 255 x 256KiB sectors + 4 x 64KiB sectors at the end = 259 */
 202 #define CONFIG_SYS_MAX_FLASH_SECT       259
 203 /* Store environment at top of flash in the same location as blank.img */
 204 /* in the Juno firmware. */
 205 #else
 206 #define CONFIG_SYS_FLASH_BASE           (V2M_PA_BASE + 0x0C000000)
 207 /* 256 x 256KiB sectors */
 208 #define CONFIG_SYS_MAX_FLASH_SECT       256
 209 /* Store environment at top of flash */
 210 #endif
 211
 212 #define CONFIG_SYS_FLASH_CFI_WIDTH      FLASH_CFI_32BIT
 213 #define CONFIG_SYS_MAX_FLASH_BANKS      1
 214
 215 #ifdef CONFIG_USB_EHCI_HCD
 216 #define CONFIG_USB_OHCI_NEW
 217 #define CONFIG_SYS_USB_OHCI_MAX_ROOT_PORTS 1
 218 #endif
 219
 220 #define CONFIG_SYS_FLASH_EMPTY_INFO     /* flinfo indicates empty blocks */
 221 #define FLASH_MAX_SECTOR_SIZE           0x00040000
 222
 223 #endif /* __VEXPRESS_AEMV8_H */