766707dd881a5530202e67baf3c15b4041d90557
[platform/kernel/u-boot.git] / include / configs / verdin-imx8mp.h
1 /* SPDX-License-Identifier: GPL-2.0-or-later */
2 /*
3  * Copyright 2022 Toradex
4  */
5
6 #ifndef __VERDIN_IMX8MP_H
7 #define __VERDIN_IMX8MP_H
8
9 #include <asm/arch/imx-regs.h>
10 #include <linux/sizes.h>
11
12 #define CONFIG_SPL_MAX_SIZE                             (152 * 1024)
13 #define CONFIG_SYS_MONITOR_LEN                          SZ_512K
14 #define CONFIG_SYS_UBOOT_BASE   \
15         (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
16
17 #ifdef CONFIG_SPL_BUILD
18 /*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/
19 #define CONFIG_SPL_STACK                0x960000
20 #define CONFIG_SPL_BSS_START_ADDR       0x0098fc00
21 #define CONFIG_SPL_BSS_MAX_SIZE         SZ_1K
22 #define CONFIG_SYS_SPL_MALLOC_START     0x42200000
23 #define CONFIG_SYS_SPL_MALLOC_SIZE      SZ_512K
24
25 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
26 #define CONFIG_MALLOC_F_ADDR                            0x184000
27 /* For RAW image gives a error info not panic */
28 #define CONFIG_SPL_ABORT_ON_RAW_IMAGE
29
30 #define CONFIG_POWER_PCA9450
31
32 #define CONFIG_SYS_I2C
33 #endif /* CONFIG_SPL_BUILD */
34
35 /* ENET Config */
36 /* ENET1 */
37 #if defined(CONFIG_CMD_NET)
38 #define CONFIG_ETHPRIME                 "eth0" /* eqos is aliased on-module Ethernet interface */
39
40 #define CONFIG_FEC_XCV_TYPE             RGMII
41 #define CONFIG_FEC_MXC_PHYADDR          7
42 #define FEC_QUIRK_ENET_MAC
43
44 #define PHY_ANEG_TIMEOUT 20000
45 #endif /* CONFIG_CMD_NET */
46
47 #define MEM_LAYOUT_ENV_SETTINGS \
48         "fdt_addr_r=0x43000000\0" \
49         "kernel_addr_r=0x40000000\0" \
50         "ramdisk_addr_r=0x46400000\0" \
51         "scriptaddr=0x46000000\0"
52
53 /* Enable Distro Boot */
54 #ifndef CONFIG_SPL_BUILD
55 #define BOOT_TARGET_DEVICES(func) \
56         func(MMC, mmc, 1) \
57         func(MMC, mmc, 2) \
58         func(DHCP, dhcp, na)
59 #include <config_distro_bootcmd.h>
60 #undef CONFIG_ISO_PARTITION
61 #else
62 #define BOOTENV
63 #endif
64
65 #if defined(CONFIG_TDX_EASY_INSTALLER)
66 #  define BOOT_SCRIPT   "boot-tezi.scr"
67 #else
68 #  define BOOT_SCRIPT   "boot.scr"
69 #endif
70
71 /* Initial environment variables */
72 #define CONFIG_EXTRA_ENV_SETTINGS \
73         BOOTENV \
74         MEM_LAYOUT_ENV_SETTINGS \
75         "bootcmd_mfg=fastboot 0\0" \
76         "boot_file=Image\0" \
77         "boot_scripts=" BOOT_SCRIPT "\0" \
78         "boot_script_dhcp=" BOOT_SCRIPT "\0" \
79         "console=ttymxc2\0" \
80         "fdt_board=dev\0" \
81         "initrd_addr=0x43800000\0" \
82         "initrd_high=0xffffffffffffffff\0" \
83         "netargs=setenv bootargs console=${console},${baudrate} " \
84                 "root=/dev/nfs ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp" \
85                 "\0" \
86         "nfsboot=run netargs; dhcp ${loadaddr} ${boot_file}; " \
87                 "tftp ${fdt_addr} verdin/${fdtfile}; " \
88                 "booti ${loadaddr} - ${fdt_addr}\0" \
89         "setup=setenv setupargs console=${console},${baudrate} console=tty1 " \
90                 "consoleblank=0 earlycon\0" \
91         "update_uboot=askenv confirm Did you load flash.bin (y/N)?; " \
92                 "if test \"$confirm\" = \"y\"; then " \
93                 "setexpr blkcnt ${filesize} + 0x1ff && setexpr blkcnt " \
94                 "${blkcnt} / 0x200; mmc dev 2 1; mmc write ${loadaddr} 0x0 " \
95                 "${blkcnt}; fi\0"
96
97 #define CONFIG_SYS_INIT_RAM_ADDR        0x40000000
98 #define CONFIG_SYS_INIT_RAM_SIZE        SZ_512K
99 #define CONFIG_SYS_INIT_SP_OFFSET \
100         (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
101 #define CONFIG_SYS_INIT_SP_ADDR \
102         (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
103
104 #define CONFIG_SYS_BOOTM_LEN            SZ_64M /* Increase max gunzip size */
105
106 /* i.MX 8M Plus supports max. 8GB memory in two albeit concecutive banks */
107 #define CONFIG_SYS_SDRAM_BASE           0x40000000
108 #define PHYS_SDRAM                      0x40000000
109 #define PHYS_SDRAM_SIZE                 (SZ_2G + SZ_1G)
110 #define PHYS_SDRAM_2                    0x100000000
111 #define PHYS_SDRAM_2_SIZE               (SZ_4G + SZ_1G)
112
113 /* UART */
114 #define CONFIG_MXC_UART_BASE            UART3_BASE_ADDR
115
116 /* Monitor Command Prompt */
117 #define CONFIG_SYS_CBSIZE               SZ_2K
118 #define CONFIG_SYS_MAXARGS              64
119 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE
120 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
121                                         sizeof(CONFIG_SYS_PROMPT) + 16)
122
123 /* USDHC */
124 #define CONFIG_SYS_FSL_USDHC_NUM        2
125 #define CONFIG_SYS_FSL_ESDHC_ADDR       0
126
127 #endif /* __VERDIN_IMX8MP_H */