1 /* SPDX-License-Identifier: GPL-2.0-or-later */
3 * Copyright 2022 Toradex
6 #ifndef __VERDIN_IMX8MP_H
7 #define __VERDIN_IMX8MP_H
9 #include <asm/arch/imx-regs.h>
10 #include <linux/sizes.h>
12 #define CONFIG_SPL_MAX_SIZE (152 * 1024)
13 #define CONFIG_SYS_MONITOR_LEN SZ_512K
14 #define CONFIG_SYS_UBOOT_BASE \
15 (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
17 #ifdef CONFIG_SPL_BUILD
18 /*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/
19 #define CONFIG_SPL_STACK 0x960000
20 #define CONFIG_SPL_BSS_START_ADDR 0x0098fc00
21 #define CONFIG_SPL_BSS_MAX_SIZE SZ_1K
22 #define CONFIG_SYS_SPL_MALLOC_START 0x42200000
23 #define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K
25 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
26 #define CONFIG_MALLOC_F_ADDR 0x184000
27 /* For RAW image gives a error info not panic */
28 #define CONFIG_SPL_ABORT_ON_RAW_IMAGE
30 #define CONFIG_POWER_PCA9450
32 #define CONFIG_SYS_I2C
33 #endif /* CONFIG_SPL_BUILD */
37 #if defined(CONFIG_CMD_NET)
38 #define CONFIG_FEC_MXC_PHYADDR 7
40 #define PHY_ANEG_TIMEOUT 20000
41 #endif /* CONFIG_CMD_NET */
43 #define MEM_LAYOUT_ENV_SETTINGS \
44 "fdt_addr_r=0x43000000\0" \
45 "kernel_addr_r=0x40000000\0" \
46 "ramdisk_addr_r=0x46400000\0" \
47 "scriptaddr=0x46000000\0"
49 /* Enable Distro Boot */
50 #ifndef CONFIG_SPL_BUILD
51 #define BOOT_TARGET_DEVICES(func) \
55 #include <config_distro_bootcmd.h>
60 #if defined(CONFIG_TDX_EASY_INSTALLER)
61 # define BOOT_SCRIPT "boot-tezi.scr"
63 # define BOOT_SCRIPT "boot.scr"
66 /* Initial environment variables */
67 #define CONFIG_EXTRA_ENV_SETTINGS \
69 MEM_LAYOUT_ENV_SETTINGS \
70 "bootcmd_mfg=fastboot 0\0" \
72 "boot_scripts=" BOOT_SCRIPT "\0" \
73 "boot_script_dhcp=" BOOT_SCRIPT "\0" \
76 "initrd_addr=0x43800000\0" \
77 "initrd_high=0xffffffffffffffff\0" \
78 "setup=setenv setupargs console=tty1 console=${console},${baudrate} " \
79 "consoleblank=0 earlycon\0" \
80 "update_uboot=askenv confirm Did you load flash.bin (y/N)?; " \
81 "if test \"$confirm\" = \"y\"; then " \
82 "setexpr blkcnt ${filesize} + 0x1ff && setexpr blkcnt " \
83 "${blkcnt} / 0x200; mmc dev 2 1; mmc write ${loadaddr} 0x0 " \
86 #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
87 #define CONFIG_SYS_INIT_RAM_SIZE SZ_512K
88 #define CONFIG_SYS_INIT_SP_OFFSET \
89 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
90 #define CONFIG_SYS_INIT_SP_ADDR \
91 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
93 #define CONFIG_SYS_BOOTM_LEN SZ_64M /* Increase max gunzip size */
95 /* i.MX 8M Plus supports max. 8GB memory in two albeit concecutive banks */
96 #define CONFIG_SYS_SDRAM_BASE 0x40000000
97 #define PHYS_SDRAM 0x40000000
98 #define PHYS_SDRAM_SIZE (SZ_2G + SZ_1G)
99 #define PHYS_SDRAM_2 0x100000000
100 #define PHYS_SDRAM_2_SIZE (SZ_4G + SZ_1G)
103 #define CONFIG_MXC_UART_BASE UART_BASE_ADDR(3)
105 /* Monitor Command Prompt */
106 #define CONFIG_SYS_CBSIZE SZ_2K
107 #define CONFIG_SYS_MAXARGS 64
108 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
109 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
110 sizeof(CONFIG_SYS_PROMPT) + 16)
112 #endif /* __VERDIN_IMX8MP_H */