Merge tag 'xilinx-for-v2022.01-rc1' of https://source.denx.de/u-boot/custodians/u...
[platform/kernel/u-boot.git] / include / configs / verdin-imx8mm.h
1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * Copyright 2020 Toradex
4  */
5
6 #ifndef __VERDIN_IMX8MM_H
7 #define __VERDIN_IMX8MM_H
8
9 #include <asm/arch/imx-regs.h>
10 #include <linux/sizes.h>
11
12 #define CONFIG_SPL_MAX_SIZE             (148 * 1024)
13 #define CONFIG_SYS_MONITOR_LEN          SZ_512K
14 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
15 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300
16 #define CONFIG_SYS_UBOOT_BASE   \
17         (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
18
19 #define CONFIG_SYS_BOOTM_LEN           SZ_64M
20
21 #ifdef CONFIG_SPL_BUILD
22 #define CONFIG_SPL_STACK                0x920000
23 #define CONFIG_SPL_BSS_START_ADDR       0x910000
24 #define CONFIG_SPL_BSS_MAX_SIZE         SZ_8K   /* 8 KB */
25 #define CONFIG_SYS_SPL_MALLOC_START     0x42200000
26 #define CONFIG_SYS_SPL_MALLOC_SIZE      SZ_512K /* 512 KB */
27
28 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
29 #define CONFIG_MALLOC_F_ADDR            0x930000
30 /* For RAW image gives a error info not panic */
31 #define CONFIG_SPL_ABORT_ON_RAW_IMAGE
32 #endif
33
34 #define MEM_LAYOUT_ENV_SETTINGS \
35         "fdt_addr_r=0x44000000\0" \
36         "kernel_addr_r=0x42000000\0" \
37         "ramdisk_addr_r=0x46400000\0" \
38         "scriptaddr=0x46000000\0"
39
40 /* Enable Distro Boot */
41 #ifndef CONFIG_SPL_BUILD
42 #define BOOT_TARGET_DEVICES(func) \
43         func(MMC, mmc, 1) \
44         func(MMC, mmc, 0) \
45         func(DHCP, dhcp, na)
46 #include <config_distro_bootcmd.h>
47 #undef CONFIG_ISO_PARTITION
48 #else
49 #define BOOTENV
50 #endif
51
52 /* Initial environment variables */
53 #define CONFIG_EXTRA_ENV_SETTINGS \
54         BOOTENV \
55         MEM_LAYOUT_ENV_SETTINGS \
56         "bootcmd_mfg=fastboot 0\0" \
57         "console=ttymxc0\0" \
58         "fdt_addr=0x43000000\0" \
59         "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \
60         "initrd_addr=0x43800000\0" \
61         "initrd_high=0xffffffffffffffff\0" \
62         "kernel_image=Image\0" \
63         "netargs=setenv bootargs console=${console},${baudrate} " \
64                 "root=/dev/nfs ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp" \
65                 "\0" \
66         "nfsboot=run netargs; dhcp ${loadaddr} ${kernel_image}; " \
67                 "tftp ${fdt_addr} verdin/${fdtfile}; " \
68                 "booti ${loadaddr} - ${fdt_addr}\0" \
69         "setup=setenv setupargs console=${console},${baudrate} " \
70                 "console=tty1 consoleblank=0 earlycon\0" \
71         "update_uboot=askenv confirm Did you load flash.bin (y/N)?; " \
72                 "if test \"$confirm\" = \"y\"; then " \
73                 "setexpr blkcnt ${filesize} + 0x1ff && setexpr blkcnt " \
74                 "${blkcnt} / 0x200; mmc dev 0 1; mmc write ${loadaddr} 0x2 " \
75                 "${blkcnt}; fi\0"
76
77 #define CONFIG_SYS_INIT_RAM_ADDR        0x40000000
78 #define CONFIG_SYS_INIT_RAM_SIZE        SZ_2M
79 #define CONFIG_SYS_INIT_SP_OFFSET \
80         (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
81 #define CONFIG_SYS_INIT_SP_ADDR \
82         (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
83
84 #if defined(CONFIG_ENV_IS_IN_MMC)
85 /* Environment in eMMC, before config block at the end of 1st "boot sector" */
86 #endif
87
88 #define CONFIG_SYS_SDRAM_BASE           0x40000000
89
90 /* SDRAM configuration */
91 #define PHYS_SDRAM                      0x40000000
92 #define PHYS_SDRAM_SIZE                 SZ_2G /* 2GB DDR */
93
94 /* UART */
95 #define CONFIG_MXC_UART_BASE            UART1_BASE_ADDR
96
97 /* Monitor Command Prompt */
98 #define CONFIG_SYS_CBSIZE               SZ_2K
99 #define CONFIG_SYS_MAXARGS              64
100 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE
101 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
102                                         sizeof(CONFIG_SYS_PROMPT) + 16)
103 /* USDHC */
104 #define CONFIG_FSL_USDHC
105 #define CONFIG_SYS_FSL_USDHC_NUM        2
106 #define CONFIG_SYS_FSL_ESDHC_ADDR       0
107 #define CONFIG_SYS_MMC_IMG_LOAD_PART    1
108
109 /* ENET */
110 #define CONFIG_ETHPRIME                 "FEC"
111 #define CONFIG_FEC_XCV_TYPE             RGMII
112 #define CONFIG_FEC_MXC_PHYADDR          7
113 #define FEC_QUIRK_ENET_MAC
114 #define IMX_FEC_BASE                    0x30BE0000
115
116 /* USB Configs */
117 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
118 #define CONFIG_MXC_USB_PORTSC   (PORT_PTS_UTMI | PORT_PTS_PTW)
119 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
120
121 #endif /*_VERDIN_IMX8MM_H */