include/configs/verdin-imx8mm.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * Copyright 2020-2021 Toradex
   4  */
   5
   6 #ifndef __VERDIN_IMX8MM_H
   7 #define __VERDIN_IMX8MM_H
   8
   9 #include <asm/arch/imx-regs.h>
  10 #include <linux/sizes.h>
  11
  12 #define CONFIG_SPL_MAX_SIZE             (148 * 1024)
  13 #define CONFIG_SYS_MONITOR_LEN          SZ_512K
  14 #define CONFIG_SYS_UBOOT_BASE   \
  15         (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
  16
  17 #define CONFIG_SYS_BOOTM_LEN           SZ_64M
  18
  19 #ifdef CONFIG_SPL_BUILD
  20 #define CONFIG_SPL_STACK                0x920000
  21 #define CONFIG_SPL_BSS_START_ADDR       0x910000
  22 #define CONFIG_SPL_BSS_MAX_SIZE         SZ_8K   /* 8 KB */
  23 #define CONFIG_SYS_SPL_MALLOC_START     0x42200000
  24 #define CONFIG_SYS_SPL_MALLOC_SIZE      SZ_512K /* 512 KB */
  25
  26 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
  27 #define CONFIG_MALLOC_F_ADDR            0x930000
  28 /* For RAW image gives a error info not panic */
  29 #define CONFIG_SPL_ABORT_ON_RAW_IMAGE
  30 #endif
  31
  32 #define MEM_LAYOUT_ENV_SETTINGS \
  33         "fdt_addr_r=0x44000000\0" \
  34         "kernel_addr_r=0x42000000\0" \
  35         "ramdisk_addr_r=0x46400000\0" \
  36         "scriptaddr=0x46000000\0"
  37
  38 /* Enable Distro Boot */
  39 #ifndef CONFIG_SPL_BUILD
  40 #define BOOT_TARGET_DEVICES(func) \
  41         func(MMC, mmc, 1) \
  42         func(MMC, mmc, 0) \
  43         func(DHCP, dhcp, na)
  44 #include <config_distro_bootcmd.h>
  45 #else
  46 #define BOOTENV
  47 #endif
  48
  49 /* Initial environment variables */
  50 #define CONFIG_EXTRA_ENV_SETTINGS \
  51         BOOTENV \
  52         MEM_LAYOUT_ENV_SETTINGS \
  53         "bootcmd_mfg=fastboot 0\0" \
  54         "boot_file=Image\0" \
  55         "console=ttymxc0\0" \
  56         "fdt_addr=0x43000000\0" \
  57         "fdt_board=dev\0" \
  58         "initrd_addr=0x43800000\0" \
  59         "initrd_high=0xffffffffffffffff\0" \
  60         "netargs=setenv bootargs console=${console},${baudrate} " \
  61                 "root=/dev/nfs ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp" \
  62                 "\0" \
  63         "nfsboot=run netargs; dhcp ${loadaddr} ${boot_file}; " \
  64                 "tftp ${fdt_addr} verdin/${fdtfile}; " \
  65                 "booti ${loadaddr} - ${fdt_addr}\0" \
  66         "setup=setenv setupargs console=${console},${baudrate} " \
  67                 "console=tty1 consoleblank=0 earlycon\0" \
  68         "update_uboot=askenv confirm Did you load flash.bin (y/N)?; " \
  69                 "if test \"$confirm\" = \"y\"; then " \
  70                 "setexpr blkcnt ${filesize} + 0x1ff && setexpr blkcnt " \
  71                 "${blkcnt} / 0x200; mmc dev 0 1; mmc write ${loadaddr} 0x2 " \
  72                 "${blkcnt}; fi\0"
  73
  74 #define CONFIG_SYS_INIT_RAM_ADDR        0x40000000
  75 #define CONFIG_SYS_INIT_RAM_SIZE        SZ_2M
  76 #define CONFIG_SYS_INIT_SP_OFFSET \
  77         (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
  78 #define CONFIG_SYS_INIT_SP_ADDR \
  79         (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
  80
  81 #if defined(CONFIG_ENV_IS_IN_MMC)
  82 /* Environment in eMMC, before config block at the end of 1st "boot sector" */
  83 #endif
  84
  85 #define CONFIG_SYS_SDRAM_BASE           0x40000000
  86
  87 /* SDRAM configuration */
  88 #define PHYS_SDRAM                      0x40000000
  89 #define PHYS_SDRAM_SIZE                 SZ_2G /* 2GB DDR */
  90
  91 /* UART */
  92 #define CONFIG_MXC_UART_BASE            UART1_BASE_ADDR
  93
  94 /* Monitor Command Prompt */
  95 #define CONFIG_SYS_CBSIZE               SZ_2K
  96 #define CONFIG_SYS_MAXARGS              64
  97 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE
  98 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
  99                                         sizeof(CONFIG_SYS_PROMPT) + 16)
 100 /* USDHC */
 101 #define CONFIG_SYS_FSL_USDHC_NUM        2
 102 #define CONFIG_SYS_FSL_ESDHC_ADDR       0
 103
 104 /* ENET */
 105 #define CONFIG_FEC_MXC_PHYADDR          7
 106 #define FEC_QUIRK_ENET_MAC
 107 #define IMX_FEC_BASE                    0x30BE0000
 108
 109 /* USB Configs */
 110 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
 111 #define CONFIG_MXC_USB_PORTSC   (PORT_PTS_UTMI | PORT_PTS_PTW)
 112 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
 113
 114 #endif /* __VERDIN_IMX8MM_H */