include/configs/verdin-imx8mm.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /*
   3  * Copyright 2020 Toradex
   4  */
   5
   6 #ifndef __VERDIN_IMX8MM_H
   7 #define __VERDIN_IMX8MM_H
   8
   9 #include <asm/arch/imx-regs.h>
  10 #include <linux/sizes.h>
  11
  12 #define CONFIG_SPL_MAX_SIZE             (148 * 1024)
  13 #define CONFIG_SYS_MONITOR_LEN          SZ_512K
  14 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
  15 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300
  16 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION      1
  17 #define CONFIG_SYS_UBOOT_BASE   \
  18         (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
  19
  20 #ifdef CONFIG_SPL_BUILD
  21 #define CONFIG_SPL_STACK                0x920000
  22 #define CONFIG_SPL_BSS_START_ADDR       0x910000
  23 #define CONFIG_SPL_BSS_MAX_SIZE         SZ_8K   /* 8 KB */
  24 #define CONFIG_SYS_SPL_MALLOC_START     0x42200000
  25 #define CONFIG_SYS_SPL_MALLOC_SIZE      SZ_512K /* 512 KB */
  26
  27 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
  28 #define CONFIG_MALLOC_F_ADDR            0x930000
  29 /* For RAW image gives a error info not panic */
  30 #define CONFIG_SPL_ABORT_ON_RAW_IMAGE
  31 #endif
  32
  33 #define MEM_LAYOUT_ENV_SETTINGS \
  34         "fdt_addr_r=0x44000000\0" \
  35         "kernel_addr_r=0x42000000\0" \
  36         "ramdisk_addr_r=0x46400000\0" \
  37         "scriptaddr=0x46000000\0"
  38
  39 #define CONFIG_LOADADDR         0x40480000
  40 #define CONFIG_SYS_LOAD_ADDR            CONFIG_LOADADDR
  41
  42 /* Enable Distro Boot */
  43 #ifndef CONFIG_SPL_BUILD
  44 #define BOOT_TARGET_DEVICES(func) \
  45         func(MMC, mmc, 1) \
  46         func(MMC, mmc, 0) \
  47         func(DHCP, dhcp, na)
  48 #include <config_distro_bootcmd.h>
  49 #undef CONFIG_ISO_PARTITION
  50 #else
  51 #define BOOTENV
  52 #endif
  53
  54 /* Initial environment variables */
  55 #define CONFIG_EXTRA_ENV_SETTINGS \
  56         BOOTENV \
  57         MEM_LAYOUT_ENV_SETTINGS \
  58         "bootcmd_mfg=fastboot 0\0" \
  59         "console=ttymxc0\0" \
  60         "fdt_addr=0x43000000\0" \
  61         "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \
  62         "initrd_addr=0x43800000\0" \
  63         "initrd_high=0xffffffffffffffff\0" \
  64         "kernel_image=Image\0" \
  65         "netargs=setenv bootargs console=${console},${baudrate} " \
  66                 "root=/dev/nfs ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp" \
  67                 "\0" \
  68         "nfsboot=run netargs; dhcp ${loadaddr} ${kernel_image}; " \
  69                 "tftp ${fdt_addr} verdin/${fdtfile}; " \
  70                 "booti ${loadaddr} - ${fdt_addr}\0" \
  71         "setup=setenv setupargs console=${console},${baudrate} " \
  72                 "console=tty1 consoleblank=0 earlycon\0" \
  73         "update_uboot=askenv confirm Did you load flash.bin (y/N)?; " \
  74                 "if test \"$confirm\" = \"y\"; then " \
  75                 "setexpr blkcnt ${filesize} + 0x1ff && setexpr blkcnt " \
  76                 "${blkcnt} / 0x200; mmc dev 0 1; mmc write ${loadaddr} 0x2 " \
  77                 "${blkcnt}; fi\0"
  78
  79 #define CONFIG_SYS_INIT_RAM_ADDR        0x40000000
  80 #define CONFIG_SYS_INIT_RAM_SIZE        SZ_2M
  81 #define CONFIG_SYS_INIT_SP_OFFSET \
  82         (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
  83 #define CONFIG_SYS_INIT_SP_ADDR \
  84         (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
  85
  86 #define CONFIG_ENV_OVERWRITE
  87 #if defined(CONFIG_ENV_IS_IN_MMC)
  88 /* Environment in eMMC, before config block at the end of 1st "boot sector" */
  89 #define CONFIG_SYS_MMC_ENV_DEV          0       /* USDHC1 eMMC */
  90 #define CONFIG_SYS_MMC_ENV_PART 1
  91 #endif
  92
  93 /* Size of malloc() pool */
  94 #define CONFIG_SYS_MALLOC_LEN           SZ_32M
  95 #define CONFIG_SYS_SDRAM_BASE           0x40000000
  96
  97 /* SDRAM configuration */
  98 #define PHYS_SDRAM                      0x40000000
  99 #define PHYS_SDRAM_SIZE                 SZ_2G /* 2GB DDR */
 100
 101 /* UART */
 102 #define CONFIG_MXC_UART_BASE            UART1_BASE_ADDR
 103
 104 /* Monitor Command Prompt */
 105 #define CONFIG_SYS_PROMPT_HUSH_PS2      "> "
 106 #define CONFIG_SYS_CBSIZE               SZ_2K
 107 #define CONFIG_SYS_MAXARGS              64
 108 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE
 109 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
 110                                         sizeof(CONFIG_SYS_PROMPT) + 16)
 111 /* USDHC */
 112 #define CONFIG_FSL_USDHC
 113 #define CONFIG_SYS_FSL_USDHC_NUM        2
 114 #define CONFIG_SYS_FSL_ESDHC_ADDR       0
 115 #define CONFIG_SYS_MMC_IMG_LOAD_PART    1
 116 #define CONFIG_SYS_I2C_SPEED            100000
 117
 118 /* ENET */
 119 #define CONFIG_ETHPRIME                 "FEC"
 120 #define CONFIG_FEC_XCV_TYPE             RGMII
 121 #define CONFIG_FEC_MXC_PHYADDR          7
 122 #define FEC_QUIRK_ENET_MAC
 123 #define IMX_FEC_BASE                    0x30BE0000
 124
 125 #endif /*_VERDIN_IMX8MM_H */
 126