1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright 2020 Toradex
6 #ifndef __VERDIN_IMX8MM_H
7 #define __VERDIN_IMX8MM_H
9 #include <asm/arch/imx-regs.h>
10 #include <linux/sizes.h>
12 #ifdef CONFIG_SECURE_BOOT
13 #define CONFIG_CSF_SIZE SZ_8K
16 #define CONFIG_SPL_MAX_SIZE (148 * 1024)
17 #define CONFIG_SYS_MONITOR_LEN SZ_512K
18 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
19 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300
20 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION 1
21 #define CONFIG_SYS_UBOOT_BASE \
22 (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
24 #ifdef CONFIG_SPL_BUILD
25 #define CONFIG_SPL_STACK 0x920000
26 #define CONFIG_SPL_BSS_START_ADDR 0x910000
27 #define CONFIG_SPL_BSS_MAX_SIZE SZ_8K /* 8 KB */
28 #define CONFIG_SYS_SPL_MALLOC_START 0x42200000
29 #define CONFIG_SYS_SPL_MALLOC_SIZE SZ_512K /* 512 KB */
31 /* malloc f used before GD_FLG_FULL_MALLOC_INIT set */
32 #define CONFIG_MALLOC_F_ADDR 0x930000
33 /* For RAW image gives a error info not panic */
34 #define CONFIG_SPL_ABORT_ON_RAW_IMAGE
37 #define MEM_LAYOUT_ENV_SETTINGS \
38 "fdt_addr_r=0x44000000\0" \
39 "kernel_addr_r=0x42000000\0" \
40 "ramdisk_addr_r=0x46400000\0" \
41 "scriptaddr=0x46000000\0"
43 #define CONFIG_LOADADDR 0x40480000
44 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
46 /* Enable Distro Boot */
47 #ifndef CONFIG_SPL_BUILD
48 #define BOOT_TARGET_DEVICES(func) \
52 #include <config_distro_bootcmd.h>
53 #undef CONFIG_ISO_PARTITION
58 /* Initial environment variables */
59 #define CONFIG_EXTRA_ENV_SETTINGS \
61 MEM_LAYOUT_ENV_SETTINGS \
62 "bootcmd_mfg=fastboot 0\0" \
64 "fdt_addr=0x43000000\0" \
65 "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \
66 "initrd_addr=0x43800000\0" \
67 "initrd_high=0xffffffffffffffff\0" \
68 "kernel_image=Image\0" \
69 "netargs=setenv bootargs console=${console},${baudrate} " \
70 "root=/dev/nfs ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp" \
72 "nfsboot=run netargs; dhcp ${loadaddr} ${kernel_image}; " \
73 "tftp ${fdt_addr} verdin/${fdtfile}; " \
74 "booti ${loadaddr} - ${fdt_addr}\0" \
75 "setup=setenv setupargs console=${console},${baudrate} " \
76 "console=tty1 consoleblank=0 earlycon\0" \
77 "update_uboot=askenv confirm Did you load flash.bin (y/N)?; " \
78 "if test \"$confirm\" = \"y\"; then " \
79 "setexpr blkcnt ${filesize} + 0x1ff && setexpr blkcnt " \
80 "${blkcnt} / 0x200; mmc dev 0 1; mmc write ${loadaddr} 0x2 " \
83 #define CONFIG_SYS_INIT_RAM_ADDR 0x40000000
84 #define CONFIG_SYS_INIT_RAM_SIZE SZ_2M
85 #define CONFIG_SYS_INIT_SP_OFFSET \
86 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
87 #define CONFIG_SYS_INIT_SP_ADDR \
88 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
90 #define CONFIG_ENV_OVERWRITE
91 #if defined(CONFIG_ENV_IS_IN_MMC)
92 /* Environment in eMMC, before config block at the end of 1st "boot sector" */
93 #define CONFIG_SYS_MMC_ENV_DEV 0 /* USDHC1 eMMC */
94 #define CONFIG_SYS_MMC_ENV_PART 1
97 /* Size of malloc() pool */
98 #define CONFIG_SYS_MALLOC_LEN SZ_32M
99 #define CONFIG_SYS_SDRAM_BASE 0x40000000
101 /* SDRAM configuration */
102 #define PHYS_SDRAM 0x40000000
103 #define PHYS_SDRAM_SIZE SZ_2G /* 2GB DDR */
105 #define CONFIG_SYS_MEMTEST_START PHYS_SDRAM
106 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + \
107 (PHYS_SDRAM_SIZE >> 1))
110 #define CONFIG_MXC_UART_BASE UART1_BASE_ADDR
112 /* Monitor Command Prompt */
113 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
114 #define CONFIG_SYS_CBSIZE SZ_2K
115 #define CONFIG_SYS_MAXARGS 64
116 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
117 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
118 sizeof(CONFIG_SYS_PROMPT) + 16)
120 #define CONFIG_FSL_USDHC
121 #define CONFIG_SYS_FSL_USDHC_NUM 2
122 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
123 #define CONFIG_SYS_MMC_IMG_LOAD_PART 1
124 #define CONFIG_SYS_I2C_SPEED 100000
127 #define CONFIG_ETHPRIME "FEC"
128 #define CONFIG_FEC_XCV_TYPE RGMII
129 #define CONFIG_FEC_MXC_PHYADDR 7
130 #define FEC_QUIRK_ENET_MAC
131 #define IMX_FEC_BASE 0x30BE0000
133 #endif /*_VERDIN_IMX8MM_H */