2 * (C) Copyright 2008 Stefan Roese <sr@denx.de>, DENX Software Engineering
4 * SPDX-License-Identifier: GPL-2.0+
8 * This file contains the configuration parameters for the VCT board
14 * vct_premium_onenand_small
17 * vct_platinum_onenand
18 * vct_platinum_onenand_small
20 * vct_platinumavc_small
21 * vct_platinumavc_onenand
22 * vct_platinumavc_onenand_small
28 #define CPU_CLOCK_RATE 324000000 /* Clock for the MIPS core */
29 #define CONFIG_SYS_MIPS_TIMER_FREQ (CPU_CLOCK_RATE / 2)
31 #define CONFIG_SKIP_LOWLEVEL_INIT /* SDRAM is initialized by the bootstrap code */
33 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
34 #define CONFIG_SYS_MONITOR_LEN (256 << 10)
35 #define CONFIG_SYS_MALLOC_LEN (1 << 20)
36 #define CONFIG_SYS_BOOTPARAMS_LEN (128 << 10)
37 #define CONFIG_SYS_INIT_SP_OFFSET 0x400000
39 #if !defined(CONFIG_VCT_NAND) && !defined(CONFIG_VCT_ONENAND)
40 #define CONFIG_VCT_NOR
42 #define CONFIG_SYS_NO_FLASH
48 #ifdef CONFIG_VCT_PLATINUMAVC
49 #define UART_1_BASE 0xBDC30000
51 #define UART_1_BASE 0xBF89C000
54 #define CONFIG_SYS_NS16550_SERIAL
55 #define CONFIG_SYS_NS16550_REG_SIZE -4
56 #define CONFIG_SYS_NS16550_COM1 UART_1_BASE
57 #define CONFIG_CONS_INDEX 1
58 #define CONFIG_SYS_NS16550_CLK 921600
59 #define CONFIG_BAUDRATE 115200
64 #define CONFIG_SYS_SDRAM_BASE 0x80000000
65 #define CONFIG_SYS_MBYTES_SDRAM 128
66 #define CONFIG_SYS_MEMTEST_START 0x80200000
67 #define CONFIG_SYS_MEMTEST_END 0x80400000
68 #define CONFIG_SYS_LOAD_ADDR 0x80400000 /* default load address */
70 #if defined(CONFIG_VCT_PREMIUM) || defined(CONFIG_VCT_PLATINUM)
72 * SMSC91C11x Network Card
74 #define CONFIG_SMC911X
75 #define CONFIG_SMC911X_BASE 0x00000000
76 #define CONFIG_SMC911X_32_BIT
77 #define CONFIG_NET_RETRY_COUNT 20
83 #define CONFIG_CMD_EEPROM
86 * Only Premium/Platinum have ethernet support right now
88 #if (defined(CONFIG_VCT_PREMIUM) || defined(CONFIG_VCT_PLATINUM)) && \
89 !defined(CONFIG_VCT_SMALL_IMAGE)
93 * Only Premium/Platinum have USB-EHCI support right now
95 #if (defined(CONFIG_VCT_PREMIUM) || defined(CONFIG_VCT_PLATINUM)) && \
96 !defined(CONFIG_VCT_SMALL_IMAGE)
99 #if defined(CONFIG_CMD_USB)
100 #define CONFIG_DOS_PARTITION
101 #define CONFIG_ISO_PARTITION
103 #define CONFIG_SUPPORT_VFAT
108 #define CONFIG_USB_EHCI /* Enable EHCI USB support */
109 #define CONFIG_USB_EHCI_VCT /* on VCT platform */
110 #define CONFIG_EHCI_MMIO_BIG_ENDIAN
111 #define CONFIG_EHCI_DESC_BIG_ENDIAN
112 #define CONFIG_EHCI_IS_TDI
113 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* re-init HCD after CMD_RESET */
114 #endif /* CONFIG_CMD_USB */
116 #if defined(CONFIG_VCT_NAND)
117 #define CONFIG_CMD_NAND
120 #if defined(CONFIG_VCT_ONENAND)
121 #define CONFIG_CMD_ONENAND
127 #define CONFIG_BOOTP_BOOTFILESIZE
128 #define CONFIG_BOOTP_BOOTPATH
129 #define CONFIG_BOOTP_GATEWAY
130 #define CONFIG_BOOTP_HOSTNAME
131 #define CONFIG_BOOTP_SUBNETMASK
134 * Miscellaneous configurable options
136 #define CONFIG_SYS_LONGHELP /* undef to save memory */
137 #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
138 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
139 sizeof(CONFIG_SYS_PROMPT) + 16)
140 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
141 #define CONFIG_TIMESTAMP /* Print image info with timestamp */
142 #define CONFIG_CMDLINE_EDITING /* add command line history */
143 #define CONFIG_SYS_CONSOLE_INFO_QUIET /* don't print console @ startup*/
146 * FLASH and environment organization
148 #if defined(CONFIG_VCT_NOR)
149 #define CONFIG_ENV_IS_IN_FLASH
150 #define CONFIG_FLASH_NOT_MEM_MAPPED
153 * We need special accessor functions for the CFI FLASH driver. This
154 * can be enabled via the CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS option.
156 #define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
159 * For the non-memory-mapped NOR FLASH, we need to define the
160 * NOR FLASH area. This can't be detected via the addr2info()
161 * function, since we check for flash access in the very early
162 * U-Boot code, before the NOR FLASH is detected.
164 #define CONFIG_FLASH_BASE 0xb0000000
165 #define CONFIG_FLASH_END 0xbfffffff
168 * CFI driver settings
170 #define CONFIG_SYS_FLASH_CFI /* The flash is CFI compatible */
171 #define CONFIG_FLASH_CFI_DRIVER /* Use common CFI driver */
172 #define CONFIG_SYS_FLASH_CFI_AMD_RESET 1 /* Use AMD (Spansion) reset cmd */
173 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT /* no byte writes on IXP4xx */
175 #define CONFIG_SYS_FLASH_BASE 0xb0000000
176 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
177 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
178 #define CONFIG_SYS_MAX_FLASH_SECT 512 /* max number of sectors on one chip */
180 #define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
181 #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
183 #ifdef CONFIG_ENV_IS_IN_FLASH
184 #define CONFIG_ENV_SECT_SIZE 0x10000 /* size of one complete sector */
185 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN)
186 #define CONFIG_ENV_SIZE 0x4000 /* Total Size of Environment Sector */
188 /* Address and size of Redundant Environment Sector */
189 #define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE)
190 #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
191 #endif /* CONFIG_ENV_IS_IN_FLASH */
192 #endif /* CONFIG_VCT_NOR */
194 #if defined(CONFIG_VCT_ONENAND)
195 #define CONFIG_USE_ONENAND_BOARD_INIT
196 #define CONFIG_ENV_IS_IN_ONENAND
197 #define CONFIG_SYS_ONENAND_BASE 0x00000000 /* this is not real address */
198 #define CONFIG_SYS_FLASH_BASE 0x00000000
199 #define CONFIG_ENV_ADDR (128 << 10) /* after compr. U-Boot image */
200 #define CONFIG_ENV_SIZE (128 << 10) /* erase size */
201 #endif /* CONFIG_VCT_ONENAND */
206 #define CONFIG_SYS_I2C
207 #define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
208 #define CONFIG_SYS_I2C_SOFT_SPEED 83000 /* 83 kHz is supposed to work */
209 #define CONFIG_SYS_I2C_SOFT_SLAVE 0x7f
212 * Software (bit-bang) I2C driver configuration
214 #define CONFIG_SYS_GPIO_I2C_SCL 11
215 #define CONFIG_SYS_GPIO_I2C_SDA 10
218 int vct_gpio_dir(int pin, int dir);
219 void vct_gpio_set(int pin, int val);
220 int vct_gpio_get(int pin);
223 #define I2C_INIT vct_gpio_dir(CONFIG_SYS_GPIO_I2C_SCL, 1)
224 #define I2C_ACTIVE vct_gpio_dir(CONFIG_SYS_GPIO_I2C_SDA, 1)
225 #define I2C_TRISTATE vct_gpio_dir(CONFIG_SYS_GPIO_I2C_SDA, 0)
226 #define I2C_READ vct_gpio_get(CONFIG_SYS_GPIO_I2C_SDA)
227 #define I2C_SDA(bit) vct_gpio_set(CONFIG_SYS_GPIO_I2C_SDA, bit)
228 #define I2C_SCL(bit) vct_gpio_set(CONFIG_SYS_GPIO_I2C_SCL, bit)
229 #define I2C_DELAY udelay(5) /* 1/4 I2C clock duration */
231 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
233 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 /* Bytes of address */
234 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 5 /* The Catalyst CAT24WC32 has */
235 /* 32 byte page write mode using*/
236 /* last 5 bits of the address */
237 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */
239 #define CONFIG_BOOTCOMMAND "run test3"
244 #if defined(CONFIG_VCT_ONENAND)
245 #define CONFIG_SYS_USE_UBI
246 #define CONFIG_CMD_JFFS2
247 #define CONFIG_RBTREE
248 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
249 #define CONFIG_MTD_PARTITIONS
250 #define CONFIG_CMD_MTDPARTS
252 #define MTDIDS_DEFAULT "onenand0=onenand"
253 #define MTDPARTS_DEFAULT "mtdparts=onenand:128k(u-boot)," \
260 * We need a small, stripped down image to fit into the first 128k OneNAND
261 * erase block (gzipped). This image only needs basic commands for FLASH
262 * (NOR/OneNAND) usage and Linux kernel booting.
264 #if defined(CONFIG_VCT_SMALL_IMAGE)
265 #undef CONFIG_CMD_BEDBUG
266 #undef CONFIG_CMD_EEPROM
267 #undef CONFIG_CMD_EEPROM
268 #undef CONFIG_CMD_IRQ
269 #undef CONFIG_CMD_LOADY
270 #undef CONFIG_CMD_REGINFO
271 #undef CONFIG_CMD_STRINGS
272 #undef CONFIG_CMD_TERMINAL
274 #undef CONFIG_SMC911X
275 #undef CONFIG_SYS_I2C_SOFT
277 #undef CONFIG_SYS_LONGHELP
278 #undef CONFIG_TIMESTAMP
279 #endif /* CONFIG_VCT_SMALL_IMAGE */
281 #endif /* __CONFIG_H */