2 * (C) Copyright 2008 Stefan Roese <sr@denx.de>, DENX Software Engineering
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License as
6 * published by the Free Software Foundation; either version 2 of
7 * the License, or (at your option) any later version.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * This file contains the configuration parameters for the VCT board
27 * vct_premium_onenand_small
30 * vct_platinum_onenand
31 * vct_platinum_onenand_small
33 * vct_platinumavc_small
34 * vct_platinumavc_onenand
35 * vct_platinumavc_onenand_small
41 #define CONFIG_MIPS32 /* MIPS 4Kc CPU core */
42 #define CPU_CLOCK_RATE 324000000 /* Clock for the MIPS core */
43 #define CONFIG_SYS_MIPS_TIMER_FREQ (CPU_CLOCK_RATE / 2)
44 #define CONFIG_SYS_HZ 1000
46 #define CONFIG_SKIP_LOWLEVEL_INIT /* SDRAM is initialized by the bootstrap code */
48 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
49 #define CONFIG_SYS_MONITOR_LEN (256 << 10)
50 #define CONFIG_STACKSIZE (256 << 10)
51 #define CONFIG_SYS_MALLOC_LEN (1 << 20)
52 #define CONFIG_SYS_BOOTPARAMS_LEN (128 << 10)
53 #define CONFIG_SYS_INIT_SP_OFFSET 0x400000
55 #if !defined(CONFIG_VCT_NAND) && !defined(CONFIG_VCT_ONENAND)
56 #define CONFIG_VCT_NOR
58 #define CONFIG_SYS_NO_FLASH
64 #ifdef CONFIG_VCT_PLATINUMAVC
65 #define UART_1_BASE 0xBDC30000
67 #define UART_1_BASE 0xBF89C000
70 #define CONFIG_SYS_NS16550_SERIAL
71 #define CONFIG_SYS_NS16550
72 #define CONFIG_SYS_NS16550_REG_SIZE -4
73 #define CONFIG_SYS_NS16550_COM1 UART_1_BASE
74 #define CONFIG_CONS_INDEX 1
75 #define CONFIG_SYS_NS16550_CLK 921600
76 #define CONFIG_BAUDRATE 115200
77 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
82 #define CONFIG_SYS_SDRAM_BASE 0x80000000
83 #define CONFIG_SYS_MBYTES_SDRAM 128
84 #define CONFIG_SYS_MEMTEST_START 0x80200000
85 #define CONFIG_SYS_MEMTEST_END 0x80400000
86 #define CONFIG_SYS_LOAD_ADDR 0x80400000 /* default load address */
88 #if defined(CONFIG_VCT_PREMIUM) || defined(CONFIG_VCT_PLATINUM)
90 * SMSC91C11x Network Card
92 #define CONFIG_SMC911X
93 #define CONFIG_SMC911X_BASE 0x00000000
94 #define CONFIG_SMC911X_32_BIT
95 #define CONFIG_NET_RETRY_COUNT 20
96 #define CONFIG_NET_MULTI
102 #include <config_cmd_default.h>
104 #define CONFIG_CMD_DHCP
105 #define CONFIG_CMD_ELF
106 #define CONFIG_CMD_EEPROM
107 #define CONFIG_CMD_I2C
110 * Only Premium/Platinum have ethernet support right now
112 #if defined(CONFIG_VCT_PREMIUM) || defined(CONFIG_VCT_PLATINUM)
113 #define CONFIG_CMD_PING
114 #define CONFIG_CMD_SNTP
116 #undef CONFIG_CMD_NET
120 * Only Premium/Platinum have USB-EHCI support right now
122 #if defined(CONFIG_VCT_PREMIUM) || defined(CONFIG_VCT_PLATINUM)
123 #define CONFIG_CMD_USB
124 #define CONFIG_CMD_FAT
127 #if defined(CONFIG_CMD_USB)
128 #define CONFIG_USB_STORAGE
129 #define CONFIG_DOS_PARTITION
130 #define CONFIG_ISO_PARTITION
132 #define CONFIG_SUPPORT_VFAT
137 #define CONFIG_USB_EHCI /* Enable EHCI USB support */
138 #define CONFIG_USB_EHCI_VCT /* on VCT platform */
139 #define CONFIG_EHCI_DCACHE /* with dcache handling support */
140 #define CONFIG_EHCI_MMIO_BIG_ENDIAN
141 #define CONFIG_EHCI_DESC_BIG_ENDIAN
142 #define CONFIG_EHCI_IS_TDI
143 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* re-init HCD after CMD_RESET */
144 #endif /* CONFIG_CMD_USB */
146 #if !defined(CONFIG_VCT_NOR)
147 #undef CONFIG_CMD_FLASH
148 #undef CONFIG_CMD_IMLS
151 #if defined(CONFIG_VCT_NAND)
152 #define CONFIG_CMD_NAND
155 #if defined(CONFIG_VCT_ONENAND)
156 #define CONFIG_CMD_ONENAND
162 #define CONFIG_BOOTP_BOOTFILESIZE
163 #define CONFIG_BOOTP_BOOTPATH
164 #define CONFIG_BOOTP_GATEWAY
165 #define CONFIG_BOOTP_HOSTNAME
166 #define CONFIG_BOOTP_SUBNETMASK
169 * Miscellaneous configurable options
171 #define CONFIG_SYS_LONGHELP /* undef to save memory */
172 #define CONFIG_SYS_PROMPT "VCT# " /* Monitor Command Prompt */
173 #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
174 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
175 sizeof(CONFIG_SYS_PROMPT) + 16)
176 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
177 #define CONFIG_TIMESTAMP /* Print image info with timestamp */
178 #define CONFIG_CMDLINE_EDITING /* add command line history */
179 #define CONFIG_SYS_CONSOLE_INFO_QUIET /* don't print console @ startup*/
182 * FLASH and environment organization
184 #if defined(CONFIG_VCT_NOR)
185 #define CONFIG_ENV_IS_IN_FLASH
186 #define CONFIG_FLASH_NOT_MEM_MAPPED
189 * We need special accessor functions for the CFI FLASH driver. This
190 * can be enabled via the CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS option.
192 #define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
195 * For the non-memory-mapped NOR FLASH, we need to define the
196 * NOR FLASH area. This can't be detected via the addr2info()
197 * function, since we check for flash access in the very early
198 * U-Boot code, before the NOR FLASH is detected.
200 #define CONFIG_FLASH_BASE 0xb0000000
201 #define CONFIG_FLASH_END 0xbfffffff
204 * CFI driver settings
206 #define CONFIG_SYS_FLASH_CFI /* The flash is CFI compatible */
207 #define CONFIG_FLASH_CFI_DRIVER /* Use common CFI driver */
208 #define CONFIG_SYS_FLASH_CFI_AMD_RESET 1 /* Use AMD (Spansion) reset cmd */
209 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT /* no byte writes on IXP4xx */
211 #define CONFIG_SYS_FLASH_BASE 0xb0000000
212 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
213 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
214 #define CONFIG_SYS_MAX_FLASH_SECT 512 /* max number of sectors on one chip */
216 #define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
217 #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
219 #ifdef CONFIG_ENV_IS_IN_FLASH
220 #define CONFIG_ENV_SECT_SIZE 0x10000 /* size of one complete sector */
221 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN)
222 #define CONFIG_ENV_SIZE 0x4000 /* Total Size of Environment Sector */
224 /* Address and size of Redundant Environment Sector */
225 #define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE)
226 #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
227 #endif /* CONFIG_ENV_IS_IN_FLASH */
228 #endif /* CONFIG_VCT_NOR */
230 #if defined(CONFIG_VCT_ONENAND)
231 #define CONFIG_USE_ONENAND_BOARD_INIT
232 #define CONFIG_ENV_IS_IN_ONENAND
233 #define CONFIG_SYS_ONENAND_BASE 0x00000000 /* this is not real address */
234 #define CONFIG_SYS_FLASH_BASE 0x00000000
235 #define CONFIG_ENV_ADDR (128 << 10) /* after compr. U-Boot image */
236 #define CONFIG_ENV_SIZE (128 << 10) /* erase size */
237 #endif /* CONFIG_VCT_ONENAND */
240 * Cache Configuration
242 #define CONFIG_SYS_DCACHE_SIZE 16384
243 #define CONFIG_SYS_ICACHE_SIZE 16384
244 #define CONFIG_SYS_CACHELINE_SIZE 32
249 #undef CONFIG_HARD_I2C /* I2C with hardware support */
250 #define CONFIG_SOFT_I2C /* I2C bit-banged */
252 #define CONFIG_SYS_I2C_SPEED 83000 /* 83 kHz is supposed to work */
253 #define CONFIG_SYS_I2C_SLAVE 0x7f
256 * Software (bit-bang) I2C driver configuration
258 #define CONFIG_SYS_GPIO_I2C_SCL 11
259 #define CONFIG_SYS_GPIO_I2C_SDA 10
262 int vct_gpio_dir(int pin, int dir);
263 void vct_gpio_set(int pin, int val);
264 int vct_gpio_get(int pin);
267 #define I2C_INIT vct_gpio_dir(CONFIG_SYS_GPIO_I2C_SCL, 1)
268 #define I2C_ACTIVE vct_gpio_dir(CONFIG_SYS_GPIO_I2C_SDA, 1)
269 #define I2C_TRISTATE vct_gpio_dir(CONFIG_SYS_GPIO_I2C_SDA, 0)
270 #define I2C_READ vct_gpio_get(CONFIG_SYS_GPIO_I2C_SDA)
271 #define I2C_SDA(bit) vct_gpio_set(CONFIG_SYS_GPIO_I2C_SDA, bit)
272 #define I2C_SCL(bit) vct_gpio_set(CONFIG_SYS_GPIO_I2C_SCL, bit)
273 #define I2C_DELAY udelay(5) /* 1/4 I2C clock duration */
275 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
277 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 /* Bytes of address */
278 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 5 /* The Catalyst CAT24WC32 has */
279 /* 32 byte page write mode using*/
280 /* last 5 bits of the address */
281 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */
283 #define CONFIG_BOOTCOMMAND "run test3"
284 #define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
289 #if defined(CONFIG_VCT_ONENAND)
290 #define CONFIG_SYS_USE_UBI
291 #define CONFIG_CMD_JFFS2
292 #define CONFIG_CMD_UBI
293 #define CONFIG_RBTREE
294 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
295 #define CONFIG_MTD_PARTITIONS
296 #define CONFIG_CMD_MTDPARTS
298 #define MTDIDS_DEFAULT "onenand0=onenand"
299 #define MTDPARTS_DEFAULT "mtdparts=onenand:128k(u-boot)," \
306 * We need a small, stripped down image to fit into the first 128k OneNAND
307 * erase block (gzipped). This image only needs basic commands for FLASH
308 * (NOR/OneNAND) usage and Linux kernel booting.
310 #if defined(CONFIG_VCT_SMALL_IMAGE)
311 #undef CONFIG_CMD_ASKENV
312 #undef CONFIG_CMD_BDI
313 #undef CONFIG_CMD_BEDBUG
314 #undef CONFIG_CMD_CACHE
315 #undef CONFIG_CMD_CONSOLE
316 #undef CONFIG_CMD_CRC32
317 #undef CONFIG_CMD_DHCP
318 #undef CONFIG_CMD_EEPROM
319 #undef CONFIG_CMD_EEPROM
320 #undef CONFIG_CMD_ELF
321 #undef CONFIG_CMD_FAT
322 #undef CONFIG_CMD_I2C
323 #undef CONFIG_CMD_I2C
324 #undef CONFIG_CMD_IRQ
325 #undef CONFIG_CMD_ITEST
326 #undef CONFIG_CMD_LOADB
327 #undef CONFIG_CMD_LOADS
328 #undef CONFIG_CMD_LOADY
329 #undef CONFIG_CMD_MII
330 #undef CONFIG_CMD_MISC
331 #undef CONFIG_CMD_NET
332 #undef CONFIG_CMD_PING
333 #undef CONFIG_CMD_REGINFO
334 #undef CONFIG_CMD_SNTP
335 #undef CONFIG_CMD_SOURCE
336 #undef CONFIG_CMD_STRINGS
337 #undef CONFIG_CMD_TERMINAL
338 #undef CONFIG_CMD_USB
340 #undef CONFIG_SMC911X
341 #undef CONFIG_SOFT_I2C
343 #undef CONFIG_SYS_LONGHELP
344 #undef CONFIG_TIMESTAMP
345 #endif /* CONFIG_VCT_SMALL_IMAGE */
347 #endif /* __CONFIG_H */