2 * (C) Copyright 2008 Stefan Roese <sr@denx.de>, DENX Software Engineering
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License as
6 * published by the Free Software Foundation; either version 2 of
7 * the License, or (at your option) any later version.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * This file contains the configuration parameters for the VCT board
27 * vct_premium_onenand_small
30 * vct_platinum_onenand
31 * vct_platinum_onenand_small
33 * vct_platinumavc_small
34 * vct_platinumavc_onenand
35 * vct_platinumavc_onenand_small
41 #define CONFIG_MIPS32 /* MIPS 4Kc CPU core */
42 #define CPU_CLOCK_RATE 324000000 /* Clock for the MIPS core */
43 #define CONFIG_SYS_MIPS_TIMER_FREQ (CPU_CLOCK_RATE / 2)
44 #define CONFIG_SYS_HZ 1000
46 #define CONFIG_SKIP_LOWLEVEL_INIT /* SDRAM is initialized by the bootstrap code */
48 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
49 #define CONFIG_SYS_MONITOR_LEN (256 << 10)
50 #define CONFIG_SYS_MALLOC_LEN (1 << 20)
51 #define CONFIG_SYS_BOOTPARAMS_LEN (128 << 10)
52 #define CONFIG_SYS_INIT_SP_OFFSET 0x400000
54 #if !defined(CONFIG_VCT_NAND) && !defined(CONFIG_VCT_ONENAND)
55 #define CONFIG_VCT_NOR
57 #define CONFIG_SYS_NO_FLASH
63 #ifdef CONFIG_VCT_PLATINUMAVC
64 #define UART_1_BASE 0xBDC30000
66 #define UART_1_BASE 0xBF89C000
69 #define CONFIG_SYS_NS16550_SERIAL
70 #define CONFIG_SYS_NS16550
71 #define CONFIG_SYS_NS16550_REG_SIZE -4
72 #define CONFIG_SYS_NS16550_COM1 UART_1_BASE
73 #define CONFIG_CONS_INDEX 1
74 #define CONFIG_SYS_NS16550_CLK 921600
75 #define CONFIG_BAUDRATE 115200
80 #define CONFIG_SYS_SDRAM_BASE 0x80000000
81 #define CONFIG_SYS_MBYTES_SDRAM 128
82 #define CONFIG_SYS_MEMTEST_START 0x80200000
83 #define CONFIG_SYS_MEMTEST_END 0x80400000
84 #define CONFIG_SYS_LOAD_ADDR 0x80400000 /* default load address */
86 #if defined(CONFIG_VCT_PREMIUM) || defined(CONFIG_VCT_PLATINUM)
88 * SMSC91C11x Network Card
90 #define CONFIG_SMC911X
91 #define CONFIG_SMC911X_BASE 0x00000000
92 #define CONFIG_SMC911X_32_BIT
93 #define CONFIG_NET_RETRY_COUNT 20
99 #include <config_cmd_default.h>
101 #define CONFIG_CMD_DHCP
102 #define CONFIG_CMD_ELF
103 #define CONFIG_CMD_EEPROM
104 #define CONFIG_CMD_I2C
107 * Only Premium/Platinum have ethernet support right now
109 #if (defined(CONFIG_VCT_PREMIUM) || defined(CONFIG_VCT_PLATINUM)) && \
110 !defined(CONFIG_VCT_SMALL_IMAGE)
111 #define CONFIG_CMD_PING
112 #define CONFIG_CMD_SNTP
114 #undef CONFIG_CMD_NET
115 #undef CONFIG_CMD_NFS
119 * Only Premium/Platinum have USB-EHCI support right now
121 #if (defined(CONFIG_VCT_PREMIUM) || defined(CONFIG_VCT_PLATINUM)) && \
122 !defined(CONFIG_VCT_SMALL_IMAGE)
123 #define CONFIG_CMD_USB
124 #define CONFIG_CMD_FAT
127 #if defined(CONFIG_CMD_USB)
128 #define CONFIG_USB_STORAGE
129 #define CONFIG_DOS_PARTITION
130 #define CONFIG_ISO_PARTITION
132 #define CONFIG_SUPPORT_VFAT
137 #define CONFIG_USB_EHCI /* Enable EHCI USB support */
138 #define CONFIG_USB_EHCI_VCT /* on VCT platform */
139 #define CONFIG_EHCI_MMIO_BIG_ENDIAN
140 #define CONFIG_EHCI_DESC_BIG_ENDIAN
141 #define CONFIG_EHCI_IS_TDI
142 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* re-init HCD after CMD_RESET */
143 #endif /* CONFIG_CMD_USB */
145 #if !defined(CONFIG_VCT_NOR)
146 #undef CONFIG_CMD_FLASH
147 #undef CONFIG_CMD_IMLS
150 #if defined(CONFIG_VCT_NAND)
151 #define CONFIG_CMD_NAND
154 #if defined(CONFIG_VCT_ONENAND)
155 #define CONFIG_CMD_ONENAND
161 #define CONFIG_BOOTP_BOOTFILESIZE
162 #define CONFIG_BOOTP_BOOTPATH
163 #define CONFIG_BOOTP_GATEWAY
164 #define CONFIG_BOOTP_HOSTNAME
165 #define CONFIG_BOOTP_SUBNETMASK
168 * Miscellaneous configurable options
170 #define CONFIG_SYS_LONGHELP /* undef to save memory */
171 #define CONFIG_SYS_PROMPT "VCT# " /* Monitor Command Prompt */
172 #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
173 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
174 sizeof(CONFIG_SYS_PROMPT) + 16)
175 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
176 #define CONFIG_TIMESTAMP /* Print image info with timestamp */
177 #define CONFIG_CMDLINE_EDITING /* add command line history */
178 #define CONFIG_SYS_CONSOLE_INFO_QUIET /* don't print console @ startup*/
181 * FLASH and environment organization
183 #if defined(CONFIG_VCT_NOR)
184 #define CONFIG_ENV_IS_IN_FLASH
185 #define CONFIG_FLASH_NOT_MEM_MAPPED
188 * We need special accessor functions for the CFI FLASH driver. This
189 * can be enabled via the CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS option.
191 #define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
194 * For the non-memory-mapped NOR FLASH, we need to define the
195 * NOR FLASH area. This can't be detected via the addr2info()
196 * function, since we check for flash access in the very early
197 * U-Boot code, before the NOR FLASH is detected.
199 #define CONFIG_FLASH_BASE 0xb0000000
200 #define CONFIG_FLASH_END 0xbfffffff
203 * CFI driver settings
205 #define CONFIG_SYS_FLASH_CFI /* The flash is CFI compatible */
206 #define CONFIG_FLASH_CFI_DRIVER /* Use common CFI driver */
207 #define CONFIG_SYS_FLASH_CFI_AMD_RESET 1 /* Use AMD (Spansion) reset cmd */
208 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT /* no byte writes on IXP4xx */
210 #define CONFIG_SYS_FLASH_BASE 0xb0000000
211 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
212 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
213 #define CONFIG_SYS_MAX_FLASH_SECT 512 /* max number of sectors on one chip */
215 #define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
216 #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
218 #ifdef CONFIG_ENV_IS_IN_FLASH
219 #define CONFIG_ENV_SECT_SIZE 0x10000 /* size of one complete sector */
220 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN)
221 #define CONFIG_ENV_SIZE 0x4000 /* Total Size of Environment Sector */
223 /* Address and size of Redundant Environment Sector */
224 #define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE)
225 #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
226 #endif /* CONFIG_ENV_IS_IN_FLASH */
227 #endif /* CONFIG_VCT_NOR */
229 #if defined(CONFIG_VCT_ONENAND)
230 #define CONFIG_USE_ONENAND_BOARD_INIT
231 #define CONFIG_ENV_IS_IN_ONENAND
232 #define CONFIG_SYS_ONENAND_BASE 0x00000000 /* this is not real address */
233 #define CONFIG_SYS_FLASH_BASE 0x00000000
234 #define CONFIG_ENV_ADDR (128 << 10) /* after compr. U-Boot image */
235 #define CONFIG_ENV_SIZE (128 << 10) /* erase size */
236 #endif /* CONFIG_VCT_ONENAND */
239 * Cache Configuration
241 #define CONFIG_SYS_DCACHE_SIZE 16384
242 #define CONFIG_SYS_ICACHE_SIZE 16384
243 #define CONFIG_SYS_CACHELINE_SIZE 32
248 #undef CONFIG_HARD_I2C /* I2C with hardware support */
249 #define CONFIG_SOFT_I2C /* I2C bit-banged */
251 #define CONFIG_SYS_I2C_SPEED 83000 /* 83 kHz is supposed to work */
252 #define CONFIG_SYS_I2C_SLAVE 0x7f
255 * Software (bit-bang) I2C driver configuration
257 #define CONFIG_SYS_GPIO_I2C_SCL 11
258 #define CONFIG_SYS_GPIO_I2C_SDA 10
261 int vct_gpio_dir(int pin, int dir);
262 void vct_gpio_set(int pin, int val);
263 int vct_gpio_get(int pin);
266 #define I2C_INIT vct_gpio_dir(CONFIG_SYS_GPIO_I2C_SCL, 1)
267 #define I2C_ACTIVE vct_gpio_dir(CONFIG_SYS_GPIO_I2C_SDA, 1)
268 #define I2C_TRISTATE vct_gpio_dir(CONFIG_SYS_GPIO_I2C_SDA, 0)
269 #define I2C_READ vct_gpio_get(CONFIG_SYS_GPIO_I2C_SDA)
270 #define I2C_SDA(bit) vct_gpio_set(CONFIG_SYS_GPIO_I2C_SDA, bit)
271 #define I2C_SCL(bit) vct_gpio_set(CONFIG_SYS_GPIO_I2C_SCL, bit)
272 #define I2C_DELAY udelay(5) /* 1/4 I2C clock duration */
274 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
276 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 /* Bytes of address */
277 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 5 /* The Catalyst CAT24WC32 has */
278 /* 32 byte page write mode using*/
279 /* last 5 bits of the address */
280 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */
282 #define CONFIG_BOOTCOMMAND "run test3"
283 #define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
288 #if defined(CONFIG_VCT_ONENAND)
289 #define CONFIG_SYS_USE_UBI
290 #define CONFIG_CMD_JFFS2
291 #define CONFIG_CMD_UBI
292 #define CONFIG_RBTREE
293 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
294 #define CONFIG_MTD_PARTITIONS
295 #define CONFIG_CMD_MTDPARTS
297 #define MTDIDS_DEFAULT "onenand0=onenand"
298 #define MTDPARTS_DEFAULT "mtdparts=onenand:128k(u-boot)," \
305 * We need a small, stripped down image to fit into the first 128k OneNAND
306 * erase block (gzipped). This image only needs basic commands for FLASH
307 * (NOR/OneNAND) usage and Linux kernel booting.
309 #if defined(CONFIG_VCT_SMALL_IMAGE)
310 #undef CONFIG_CMD_ASKENV
311 #undef CONFIG_CMD_BDI
312 #undef CONFIG_CMD_BEDBUG
313 #undef CONFIG_CMD_CACHE
314 #undef CONFIG_CMD_CONSOLE
315 #undef CONFIG_CMD_CRC32
316 #undef CONFIG_CMD_DHCP
317 #undef CONFIG_CMD_EEPROM
318 #undef CONFIG_CMD_EEPROM
319 #undef CONFIG_CMD_ELF
320 #undef CONFIG_CMD_FAT
321 #undef CONFIG_CMD_I2C
322 #undef CONFIG_CMD_I2C
323 #undef CONFIG_CMD_IRQ
324 #undef CONFIG_CMD_ITEST
325 #undef CONFIG_CMD_LOADB
326 #undef CONFIG_CMD_LOADS
327 #undef CONFIG_CMD_LOADY
328 #undef CONFIG_CMD_MII
329 #undef CONFIG_CMD_MISC
330 #undef CONFIG_CMD_NET
331 #undef CONFIG_CMD_PING
332 #undef CONFIG_CMD_REGINFO
333 #undef CONFIG_CMD_SNTP
334 #undef CONFIG_CMD_SOURCE
335 #undef CONFIG_CMD_STRINGS
336 #undef CONFIG_CMD_TERMINAL
337 #undef CONFIG_CMD_USB
339 #undef CONFIG_SMC911X
340 #undef CONFIG_SOFT_I2C
342 #undef CONFIG_SYS_LONGHELP
343 #undef CONFIG_TIMESTAMP
344 #endif /* CONFIG_VCT_SMALL_IMAGE */
346 #endif /* __CONFIG_H */