2 * (C) Copyright 2008 Stefan Roese <sr@denx.de>, DENX Software Engineering
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License as
6 * published by the Free Software Foundation; either version 2 of
7 * the License, or (at your option) any later version.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 * This file contains the configuration parameters for the VCT board
27 * vct_premium_onenand_small
30 * vct_platinum_onenand
31 * vct_platinum_onenand_small
33 * vct_platinumavc_small
34 * vct_platinumavc_onenand
35 * vct_platinumavc_onenand_small
41 #define CONFIG_MIPS32 /* MIPS 4Kc CPU core */
42 #define CPU_CLOCK_RATE 324000000 /* Clock for the MIPS core */
43 #define CONFIG_SYS_MIPS_TIMER_FREQ (CPU_CLOCK_RATE / 2)
44 #define CONFIG_SYS_HZ 1000
46 #define CONFIG_SKIP_LOWLEVEL_INIT /* SDRAM is initialized by the bootstrap code */
48 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
49 #define CONFIG_SYS_MONITOR_LEN (256 << 10)
50 #define CONFIG_STACKSIZE (256 << 10)
51 #define CONFIG_SYS_MALLOC_LEN (1 << 20)
52 #define CONFIG_SYS_BOOTPARAMS_LEN (128 << 10)
53 #define CONFIG_SYS_INIT_SP_OFFSET 0x400000
55 #if !defined(CONFIG_VCT_NAND) && !defined(CONFIG_VCT_ONENAND)
56 #define CONFIG_VCT_NOR
58 #define CONFIG_SYS_NO_FLASH
64 #ifdef CONFIG_VCT_PLATINUMAVC
65 #define UART_1_BASE 0xBDC30000
67 #define UART_1_BASE 0xBF89C000
70 #define CONFIG_SYS_NS16550_SERIAL
71 #define CONFIG_SYS_NS16550
72 #define CONFIG_SYS_NS16550_REG_SIZE -4
73 #define CONFIG_SYS_NS16550_COM1 UART_1_BASE
74 #define CONFIG_CONS_INDEX 1
75 #define CONFIG_SYS_NS16550_CLK 921600
76 #define CONFIG_BAUDRATE 115200
81 #define CONFIG_SYS_SDRAM_BASE 0x80000000
82 #define CONFIG_SYS_MBYTES_SDRAM 128
83 #define CONFIG_SYS_MEMTEST_START 0x80200000
84 #define CONFIG_SYS_MEMTEST_END 0x80400000
85 #define CONFIG_SYS_LOAD_ADDR 0x80400000 /* default load address */
87 #if defined(CONFIG_VCT_PREMIUM) || defined(CONFIG_VCT_PLATINUM)
89 * SMSC91C11x Network Card
91 #define CONFIG_SMC911X
92 #define CONFIG_SMC911X_BASE 0x00000000
93 #define CONFIG_SMC911X_32_BIT
94 #define CONFIG_NET_RETRY_COUNT 20
100 #include <config_cmd_default.h>
102 #define CONFIG_CMD_DHCP
103 #define CONFIG_CMD_ELF
104 #define CONFIG_CMD_EEPROM
105 #define CONFIG_CMD_I2C
108 * Only Premium/Platinum have ethernet support right now
110 #if (defined(CONFIG_VCT_PREMIUM) || defined(CONFIG_VCT_PLATINUM)) && \
111 !defined(CONFIG_VCT_SMALL_IMAGE)
112 #define CONFIG_CMD_PING
113 #define CONFIG_CMD_SNTP
115 #undef CONFIG_CMD_NET
116 #undef CONFIG_CMD_NFS
120 * Only Premium/Platinum have USB-EHCI support right now
122 #if (defined(CONFIG_VCT_PREMIUM) || defined(CONFIG_VCT_PLATINUM)) && \
123 !defined(CONFIG_VCT_SMALL_IMAGE)
124 #define CONFIG_CMD_USB
125 #define CONFIG_CMD_FAT
128 #if defined(CONFIG_CMD_USB)
129 #define CONFIG_USB_STORAGE
130 #define CONFIG_DOS_PARTITION
131 #define CONFIG_ISO_PARTITION
133 #define CONFIG_SUPPORT_VFAT
138 #define CONFIG_USB_EHCI /* Enable EHCI USB support */
139 #define CONFIG_USB_EHCI_VCT /* on VCT platform */
140 #define CONFIG_EHCI_DCACHE /* with dcache handling support */
141 #define CONFIG_EHCI_MMIO_BIG_ENDIAN
142 #define CONFIG_EHCI_DESC_BIG_ENDIAN
143 #define CONFIG_EHCI_IS_TDI
144 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET /* re-init HCD after CMD_RESET */
145 #endif /* CONFIG_CMD_USB */
147 #if !defined(CONFIG_VCT_NOR)
148 #undef CONFIG_CMD_FLASH
149 #undef CONFIG_CMD_IMLS
152 #if defined(CONFIG_VCT_NAND)
153 #define CONFIG_CMD_NAND
156 #if defined(CONFIG_VCT_ONENAND)
157 #define CONFIG_CMD_ONENAND
163 #define CONFIG_BOOTP_BOOTFILESIZE
164 #define CONFIG_BOOTP_BOOTPATH
165 #define CONFIG_BOOTP_GATEWAY
166 #define CONFIG_BOOTP_HOSTNAME
167 #define CONFIG_BOOTP_SUBNETMASK
170 * Miscellaneous configurable options
172 #define CONFIG_SYS_LONGHELP /* undef to save memory */
173 #define CONFIG_SYS_PROMPT "VCT# " /* Monitor Command Prompt */
174 #define CONFIG_SYS_CBSIZE 512 /* Console I/O Buffer Size */
175 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
176 sizeof(CONFIG_SYS_PROMPT) + 16)
177 #define CONFIG_SYS_MAXARGS 16 /* max number of command args */
178 #define CONFIG_TIMESTAMP /* Print image info with timestamp */
179 #define CONFIG_CMDLINE_EDITING /* add command line history */
180 #define CONFIG_SYS_CONSOLE_INFO_QUIET /* don't print console @ startup*/
183 * FLASH and environment organization
185 #if defined(CONFIG_VCT_NOR)
186 #define CONFIG_ENV_IS_IN_FLASH
187 #define CONFIG_FLASH_NOT_MEM_MAPPED
190 * We need special accessor functions for the CFI FLASH driver. This
191 * can be enabled via the CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS option.
193 #define CONFIG_CFI_FLASH_USE_WEAK_ACCESSORS
196 * For the non-memory-mapped NOR FLASH, we need to define the
197 * NOR FLASH area. This can't be detected via the addr2info()
198 * function, since we check for flash access in the very early
199 * U-Boot code, before the NOR FLASH is detected.
201 #define CONFIG_FLASH_BASE 0xb0000000
202 #define CONFIG_FLASH_END 0xbfffffff
205 * CFI driver settings
207 #define CONFIG_SYS_FLASH_CFI /* The flash is CFI compatible */
208 #define CONFIG_FLASH_CFI_DRIVER /* Use common CFI driver */
209 #define CONFIG_SYS_FLASH_CFI_AMD_RESET 1 /* Use AMD (Spansion) reset cmd */
210 #define CONFIG_SYS_FLASH_CFI_WIDTH FLASH_CFI_16BIT /* no byte writes on IXP4xx */
212 #define CONFIG_SYS_FLASH_BASE 0xb0000000
213 #define CONFIG_SYS_FLASH_BANKS_LIST { CONFIG_SYS_FLASH_BASE }
214 #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* max number of memory banks */
215 #define CONFIG_SYS_MAX_FLASH_SECT 512 /* max number of sectors on one chip */
217 #define CONFIG_SYS_FLASH_ERASE_TOUT 120000 /* Timeout for Flash Erase (in ms) */
218 #define CONFIG_SYS_FLASH_WRITE_TOUT 500 /* Timeout for Flash Write (in ms) */
220 #ifdef CONFIG_ENV_IS_IN_FLASH
221 #define CONFIG_ENV_SECT_SIZE 0x10000 /* size of one complete sector */
222 #define CONFIG_ENV_ADDR (CONFIG_SYS_FLASH_BASE + CONFIG_SYS_MONITOR_LEN)
223 #define CONFIG_ENV_SIZE 0x4000 /* Total Size of Environment Sector */
225 /* Address and size of Redundant Environment Sector */
226 #define CONFIG_ENV_ADDR_REDUND (CONFIG_ENV_ADDR + CONFIG_ENV_SECT_SIZE)
227 #define CONFIG_ENV_SIZE_REDUND (CONFIG_ENV_SIZE)
228 #endif /* CONFIG_ENV_IS_IN_FLASH */
229 #endif /* CONFIG_VCT_NOR */
231 #if defined(CONFIG_VCT_ONENAND)
232 #define CONFIG_USE_ONENAND_BOARD_INIT
233 #define CONFIG_ENV_IS_IN_ONENAND
234 #define CONFIG_SYS_ONENAND_BASE 0x00000000 /* this is not real address */
235 #define CONFIG_SYS_FLASH_BASE 0x00000000
236 #define CONFIG_ENV_ADDR (128 << 10) /* after compr. U-Boot image */
237 #define CONFIG_ENV_SIZE (128 << 10) /* erase size */
238 #endif /* CONFIG_VCT_ONENAND */
241 * Cache Configuration
243 #define CONFIG_SYS_DCACHE_SIZE 16384
244 #define CONFIG_SYS_ICACHE_SIZE 16384
245 #define CONFIG_SYS_CACHELINE_SIZE 32
250 #undef CONFIG_HARD_I2C /* I2C with hardware support */
251 #define CONFIG_SOFT_I2C /* I2C bit-banged */
253 #define CONFIG_SYS_I2C_SPEED 83000 /* 83 kHz is supposed to work */
254 #define CONFIG_SYS_I2C_SLAVE 0x7f
257 * Software (bit-bang) I2C driver configuration
259 #define CONFIG_SYS_GPIO_I2C_SCL 11
260 #define CONFIG_SYS_GPIO_I2C_SDA 10
263 int vct_gpio_dir(int pin, int dir);
264 void vct_gpio_set(int pin, int val);
265 int vct_gpio_get(int pin);
268 #define I2C_INIT vct_gpio_dir(CONFIG_SYS_GPIO_I2C_SCL, 1)
269 #define I2C_ACTIVE vct_gpio_dir(CONFIG_SYS_GPIO_I2C_SDA, 1)
270 #define I2C_TRISTATE vct_gpio_dir(CONFIG_SYS_GPIO_I2C_SDA, 0)
271 #define I2C_READ vct_gpio_get(CONFIG_SYS_GPIO_I2C_SDA)
272 #define I2C_SDA(bit) vct_gpio_set(CONFIG_SYS_GPIO_I2C_SDA, bit)
273 #define I2C_SCL(bit) vct_gpio_set(CONFIG_SYS_GPIO_I2C_SCL, bit)
274 #define I2C_DELAY udelay(5) /* 1/4 I2C clock duration */
276 #define CONFIG_SYS_I2C_EEPROM_ADDR 0x50
278 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2 /* Bytes of address */
279 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 5 /* The Catalyst CAT24WC32 has */
280 /* 32 byte page write mode using*/
281 /* last 5 bits of the address */
282 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10 /* and takes up to 10 msec */
284 #define CONFIG_BOOTCOMMAND "run test3"
285 #define CONFIG_BOOTDELAY 5 /* autoboot after 5 seconds */
290 #if defined(CONFIG_VCT_ONENAND)
291 #define CONFIG_SYS_USE_UBI
292 #define CONFIG_CMD_JFFS2
293 #define CONFIG_CMD_UBI
294 #define CONFIG_RBTREE
295 #define CONFIG_MTD_DEVICE /* needed for mtdparts commands */
296 #define CONFIG_MTD_PARTITIONS
297 #define CONFIG_CMD_MTDPARTS
299 #define MTDIDS_DEFAULT "onenand0=onenand"
300 #define MTDPARTS_DEFAULT "mtdparts=onenand:128k(u-boot)," \
307 * We need a small, stripped down image to fit into the first 128k OneNAND
308 * erase block (gzipped). This image only needs basic commands for FLASH
309 * (NOR/OneNAND) usage and Linux kernel booting.
311 #if defined(CONFIG_VCT_SMALL_IMAGE)
312 #undef CONFIG_CMD_ASKENV
313 #undef CONFIG_CMD_BDI
314 #undef CONFIG_CMD_BEDBUG
315 #undef CONFIG_CMD_CACHE
316 #undef CONFIG_CMD_CONSOLE
317 #undef CONFIG_CMD_CRC32
318 #undef CONFIG_CMD_DHCP
319 #undef CONFIG_CMD_EEPROM
320 #undef CONFIG_CMD_EEPROM
321 #undef CONFIG_CMD_ELF
322 #undef CONFIG_CMD_FAT
323 #undef CONFIG_CMD_I2C
324 #undef CONFIG_CMD_I2C
325 #undef CONFIG_CMD_IRQ
326 #undef CONFIG_CMD_ITEST
327 #undef CONFIG_CMD_LOADB
328 #undef CONFIG_CMD_LOADS
329 #undef CONFIG_CMD_LOADY
330 #undef CONFIG_CMD_MII
331 #undef CONFIG_CMD_MISC
332 #undef CONFIG_CMD_NET
333 #undef CONFIG_CMD_PING
334 #undef CONFIG_CMD_REGINFO
335 #undef CONFIG_CMD_SNTP
336 #undef CONFIG_CMD_SOURCE
337 #undef CONFIG_CMD_STRINGS
338 #undef CONFIG_CMD_TERMINAL
339 #undef CONFIG_CMD_USB
341 #undef CONFIG_SMC911X
342 #undef CONFIG_SOFT_I2C
344 #undef CONFIG_SYS_LONGHELP
345 #undef CONFIG_TIMESTAMP
346 #endif /* CONFIG_VCT_SMALL_IMAGE */
348 #endif /* __CONFIG_H */