1 /* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
3 * Copyright (c) 2018 Microsemi Corporation
9 #include <linux/sizes.h>
13 #define CONFIG_SYS_MALLOC_LEN 0x1F0000
14 #define CONFIG_SYS_LOAD_ADDR 0x00100000
15 #define CONFIG_SYS_INIT_SP_OFFSET 0x400000
17 #if defined(CONFIG_SOC_LUTON) || defined(CONFIG_SOC_SERVAL)
18 #define CPU_CLOCK_RATE 416666666 /* Clock for the MIPS core */
19 #define CONFIG_SYS_MIPS_TIMER_FREQ 208333333
21 #define CPU_CLOCK_RATE 500000000 /* Clock for the MIPS core */
22 #define CONFIG_SYS_MIPS_TIMER_FREQ (CPU_CLOCK_RATE / 2)
24 #define CONFIG_SYS_NS16550_CLK CONFIG_SYS_MIPS_TIMER_FREQ
26 #define CONFIG_BOARD_TYPES
28 #define CONFIG_SYS_SDRAM_BASE 0x80000000
29 #if defined(CONFIG_DDRTYPE_H5TQ1G63BFA) || defined(CONFIG_DDRTYPE_MT47H128M8HQ)
30 #define CONFIG_SYS_SDRAM_SIZE (128 * SZ_1M)
31 #elif defined(CONFIG_DDRTYPE_MT41J128M16HA) || defined(CONFIG_DDRTYPE_MT41K128M16JT)
32 #define CONFIG_SYS_SDRAM_SIZE (256 * SZ_1M)
33 #elif defined(CONFIG_DDRTYPE_H5TQ4G63MFR) || defined(CONFIG_DDRTYPE_MT41K256M16)
34 #define CONFIG_SYS_SDRAM_SIZE (512 * SZ_1M)
36 #error Unknown DDR size - please add!
39 #define CONFIG_CONS_INDEX 1
41 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
42 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + \
43 CONFIG_SYS_SDRAM_SIZE - SZ_4M)
45 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
47 #define CONFIG_BOARD_EARLY_INIT_R
48 #if defined(CONFIG_MTDIDS_DEFAULT) && defined(CONFIG_MTDPARTS_DEFAULT)
49 #define VCOREIII_DEFAULT_MTD_ENV \
50 "mtdparts="CONFIG_MTDPARTS_DEFAULT"\0" \
51 "mtdids="CONFIG_MTDIDS_DEFAULT"\0"
53 #define VCOREIII_DEFAULT_MTD_ENV /* Go away */
56 #define CONFIG_SYS_BOOTM_LEN (16 << 20) /* Increase max gunzip size */
58 #define CONFIG_EXTRA_ENV_SETTINGS \
59 VCOREIII_DEFAULT_MTD_ENV \
60 "loadaddr=0x81000000\0" \
61 "spi_image_off=0x00100000\0" \
62 "console=ttyS0,115200\0" \
63 "setup=setenv bootargs console=${console} ${mtdparts}" \
64 "${bootargs_extra}\0" \
65 "spiboot=run setup; sf probe; sf read ${loadaddr}" \
66 "${spi_image_off} 0x600000; bootm ${loadaddr}\0" \
67 "ubootfile=u-boot.bin\0" \
68 "update=sf probe;mtdparts;dhcp ${loadaddr} ${ubootfile};" \
69 "sf erase UBoot 0x100000;" \
70 "sf write ${loadaddr} UBoot ${filesize}\0" \
71 "bootcmd=run spiboot\0" \
73 #endif /* __VCOREIII_H */