include/configs/vcoreiii.h

   1 /* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */
   2 /*
   3  * Copyright (c) 2018 Microsemi Corporation
   4  */
   5
   6 #ifndef __VCOREIII_H
   7 #define __VCOREIII_H
   8
   9 #include <linux/sizes.h>
  10
  11 /* Onboard devices */
  12
  13 #define CFG_SYS_INIT_SP_OFFSET       0x400000
  14
  15 #define CFG_SYS_NS16550_CLK             CONFIG_SYS_MIPS_TIMER_FREQ
  16
  17 #define CFG_SYS_SDRAM_BASE              0x80000000
  18 #if defined(CONFIG_DDRTYPE_H5TQ1G63BFA) || defined(CONFIG_DDRTYPE_MT47H128M8HQ)
  19 #define CFG_SYS_SDRAM_SIZE              (128 * SZ_1M)
  20 #elif defined(CONFIG_DDRTYPE_MT41J128M16HA) || defined(CONFIG_DDRTYPE_MT41K128M16JT)
  21 #define CFG_SYS_SDRAM_SIZE              (256 * SZ_1M)
  22 #elif defined(CONFIG_DDRTYPE_H5TQ4G63MFR) || defined(CONFIG_DDRTYPE_MT41K256M16)
  23 #define CFG_SYS_SDRAM_SIZE              (512 * SZ_1M)
  24 #else
  25 #error Unknown DDR size - please add!
  26 #endif
  27
  28 #define CFG_EXTRA_ENV_SETTINGS                                  \
  29         "loadaddr=0x81000000\0"                                         \
  30         "spi_image_off=0x00100000\0"                                    \
  31         "console=ttyS0,115200\0"                                        \
  32         "setup=setenv bootargs console=${console} ${mtdparts}"          \
  33         "${bootargs_extra}\0"                                           \
  34         "spiboot=run setup; sf probe; sf read ${loadaddr}"              \
  35         "${spi_image_off} 0x600000; bootm ${loadaddr}\0"                \
  36         "ubootfile=u-boot.bin\0"                                        \
  37         "update=sf probe;mtdparts;dhcp ${loadaddr} ${ubootfile};"       \
  38         "sf erase UBoot 0x100000;"                                      \
  39         "sf write ${loadaddr} UBoot  ${filesize}\0"                     \
  40         "bootcmd=run spiboot\0"                                         \
  41         ""
  42 #endif                          /* __VCOREIII_H */