2 * USB armory MkI board configuration settings
3 * http://inversepath.com/usbarmory
5 * Copyright (C) 2015, Inverse Path
6 * Andrej Rosano <andrej@inversepath.com>
8 * SPDX-License-Identifier:|____GPL-2.0+
14 #define CONFIG_SYS_FSL_CLK
16 #include <asm/arch/imx-regs.h>
18 /* U-Boot environment */
19 #define CONFIG_ENV_OFFSET (6 * 64 * 1024)
20 #define CONFIG_ENV_SIZE (8 * 1024)
21 #define CONFIG_SYS_MMC_ENV_DEV 0
23 /* U-Boot general configurations */
24 #define CONFIG_SYS_CBSIZE 512
27 #define CONFIG_MXC_UART
28 #define CONFIG_MXC_UART_BASE UART1_BASE
29 #define CONFIG_CONS_INDEX 1
32 #define CONFIG_FSL_ESDHC
33 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
34 #define CONFIG_SYS_FSL_ESDHC_NUM 1
37 #define CONFIG_USB_EHCI_MX5
38 #define CONFIG_MXC_USB_PORT 1
39 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
40 #define CONFIG_MXC_USB_FLAGS 0
43 #define CONFIG_SYS_I2C
44 #define CONFIG_SYS_I2C_MXC
45 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
46 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
49 #define CONFIG_FSL_IIM
51 /* U-Boot memory offsets */
52 #define CONFIG_LOADADDR 0x72000000
53 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
56 #define CONFIG_HOSTNAME usbarmory
57 #define CONFIG_BOOTCOMMAND \
58 "run distro_bootcmd; " \
59 "setenv bootargs console=${console} ${bootargs_default}; " \
60 "ext2load mmc 0:1 ${kernel_addr_r} /boot/zImage; " \
61 "ext2load mmc 0:1 ${fdt_addr_r} /boot/${fdtfile}; " \
62 "bootz ${kernel_addr_r} - ${fdt_addr_r}"
64 #define BOOT_TARGET_DEVICES(func) func(MMC, mmc, 0)
66 #include <config_distro_bootcmd.h>
68 #define MEM_LAYOUT_ENV_SETTINGS \
69 "kernel_addr_r=0x70800000\0" \
70 "fdt_addr_r=0x71000000\0" \
71 "scriptaddr=0x70800000\0" \
72 "pxefile_addr_r=0x70800000\0" \
73 "ramdisk_addr_r=0x73000000\0"
75 #define CONFIG_EXTRA_ENV_SETTINGS \
76 MEM_LAYOUT_ENV_SETTINGS \
77 "bootargs_default=root=/dev/mmcblk0p1 rootwait rw\0" \
78 "fdtfile=imx53-usbarmory.dtb\0" \
79 "console=ttymxc0,115200\0" \
82 #ifndef CONFIG_CMDLINE
83 #define USBARMORY_FIT_PATH "/boot/usbarmory.itb"
84 #define USBARMORY_FIT_ADDR "0x70800000"
87 /* Physical Memory Map */
88 #define CONFIG_NR_DRAM_BANKS 1
89 #define PHYS_SDRAM CSD0_BASE_ADDR
90 #define PHYS_SDRAM_SIZE (gd->ram_size)
92 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
93 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
94 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
96 #define CONFIG_SYS_INIT_SP_OFFSET \
97 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
98 #define CONFIG_SYS_INIT_SP_ADDR \
99 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
101 #define CONFIG_SYS_MEMTEST_START 0x70000000
102 #define CONFIG_SYS_MEMTEST_END 0x90000000
104 #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
106 #endif /* __CONFIG_H */