2 * USB armory MkI board configuration settings
3 * http://inversepath.com/usbarmory
5 * Copyright (C) 2015, Inverse Path
6 * Andrej Rosano <andrej@inversepath.com>
8 * SPDX-License-Identifier:|____GPL-2.0+
15 #define CONFIG_SYS_FSL_CLK
16 #define CONFIG_MXC_GPIO
17 #define CONFIG_SYS_NO_FLASH
19 #include <asm/arch/imx-regs.h>
21 #include <config_distro_defaults.h>
23 /* U-Boot environment */
24 #define CONFIG_ENV_OFFSET (6 * 64 * 1024)
25 #define CONFIG_ENV_SIZE (8 * 1024)
26 #define CONFIG_ENV_IS_IN_MMC
27 #define CONFIG_SYS_MMC_ENV_DEV 0
29 /* U-Boot general configurations */
30 #define CONFIG_SYS_CBSIZE 512
31 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE+sizeof(CONFIG_SYS_PROMPT)+16)
32 #define CONFIG_SYS_MAXARGS 16
33 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
36 #define CONFIG_MXC_UART
37 #define CONFIG_MXC_UART_BASE UART1_BASE
38 #define CONFIG_CONS_INDEX 1
39 #define CONFIG_BAUDRATE 115200
42 #define CONFIG_FSL_ESDHC
43 #define CONFIG_SYS_FSL_ESDHC_ADDR 0
44 #define CONFIG_SYS_FSL_ESDHC_NUM 1
47 #define CONFIG_USB_EHCI
48 #define CONFIG_USB_EHCI_MX5
49 #define CONFIG_MXC_USB_PORT 1
50 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW)
51 #define CONFIG_MXC_USB_FLAGS 0
54 #define CONFIG_SYS_I2C
55 #define CONFIG_SYS_I2C_MXC
56 #define CONFIG_SYS_I2C_MXC_I2C1 /* enable I2C bus 1 */
57 #define CONFIG_SYS_I2C_MXC_I2C2 /* enable I2C bus 2 */
60 #define CONFIG_CMD_FUSE
61 #define CONFIG_FSL_IIM
63 /* U-Boot memory offsets */
64 #define CONFIG_LOADADDR 0x72000000
65 #define CONFIG_SYS_TEXT_BASE 0x77800000
66 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
69 #define CONFIG_HOSTNAME usbarmory
70 #define CONFIG_BOOTCOMMAND \
71 "run distro_bootcmd; " \
72 "setenv bootargs console=${console} ${bootargs_default}; " \
73 "ext2load mmc 0:1 ${kernel_addr_r} /boot/zImage; " \
74 "ext2load mmc 0:1 ${fdt_addr_r} /boot/${fdtfile}; " \
75 "bootz ${kernel_addr_r} - ${fdt_addr_r}"
77 #define BOOT_TARGET_DEVICES(func) func(MMC, mmc, 0)
79 #include <config_distro_bootcmd.h>
81 #define MEM_LAYOUT_ENV_SETTINGS \
82 "kernel_addr_r=0x70800000\0" \
83 "fdt_addr_r=0x71000000\0" \
84 "scriptaddr=0x70800000\0" \
85 "pxefile_addr_r=0x70800000\0" \
86 "ramdisk_addr_r=0x73000000\0"
88 #define CONFIG_EXTRA_ENV_SETTINGS \
89 MEM_LAYOUT_ENV_SETTINGS \
90 "bootargs_default=root=/dev/mmcblk0p1 rootwait rw\0" \
91 "fdtfile=imx53-usbarmory.dtb\0" \
92 "console=ttymxc0,115200\0" \
95 #ifndef CONFIG_CMDLINE
96 #define CONFIG_BOOTARGS "console=ttymxc0,115200 root=/dev/mmcblk0p1 rootwait rw"
97 #define USBARMORY_FIT_PATH "/boot/usbarmory.itb"
98 #define USBARMORY_FIT_ADDR "0x70800000"
101 /* Physical Memory Map */
102 #define CONFIG_NR_DRAM_BANKS 1
103 #define PHYS_SDRAM CSD0_BASE_ADDR
104 #define PHYS_SDRAM_SIZE (gd->ram_size)
106 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
107 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
108 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
110 #define CONFIG_SYS_INIT_SP_OFFSET \
111 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
112 #define CONFIG_SYS_INIT_SP_ADDR \
113 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
115 #define CONFIG_SYS_MEMTEST_START 0x70000000
116 #define CONFIG_SYS_MEMTEST_END 0x90000000
118 #define CONFIG_SYS_MALLOC_LEN (10 * 1024 * 1024)
120 #endif /* __CONFIG_H */