2 * Copyright (C) 2012-2014 Panasonic Corporation
3 * Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
5 * SPDX-License-Identifier: GPL-2.0+
8 /* U-boot - Common settings for UniPhier Family */
10 #ifndef __CONFIG_UNIPHIER_COMMON_H__
11 #define __CONFIG_UNIPHIER_COMMON_H__
13 #if defined(CONFIG_MACH_PH1_PRO4)
14 #define CONFIG_DDR_NUM_CH0 2
15 #define CONFIG_DDR_NUM_CH1 2
17 /* Physical start address of SDRAM */
18 #define CONFIG_SDRAM0_BASE 0x80000000
19 #define CONFIG_SDRAM0_SIZE 0x20000000
20 #define CONFIG_SDRAM1_BASE 0xa0000000
21 #define CONFIG_SDRAM1_SIZE 0x20000000
24 #if defined(CONFIG_MACH_PH1_LD4)
25 #define CONFIG_DDR_NUM_CH0 1
26 #define CONFIG_DDR_NUM_CH1 1
28 /* Physical start address of SDRAM */
29 #define CONFIG_SDRAM0_BASE 0x80000000
30 #define CONFIG_SDRAM0_SIZE 0x10000000
31 #define CONFIG_SDRAM1_BASE 0x90000000
32 #define CONFIG_SDRAM1_SIZE 0x10000000
35 #if defined(CONFIG_MACH_PH1_SLD8)
36 #define CONFIG_DDR_NUM_CH0 1
37 #define CONFIG_DDR_NUM_CH1 1
39 /* Physical start address of SDRAM */
40 #define CONFIG_SDRAM0_BASE 0x80000000
41 #define CONFIG_SDRAM0_SIZE 0x10000000
42 #define CONFIG_SDRAM1_BASE 0x90000000
43 #define CONFIG_SDRAM1_SIZE 0x10000000
47 * Support card address map
49 #if defined(CONFIG_PFC_MICRO_SUPPORT_CARD)
50 # define CONFIG_SUPPORT_CARD_BASE 0x03f00000
51 # define CONFIG_SUPPORT_CARD_ETHER_BASE (CONFIG_SUPPORT_CARD_BASE + 0x00000000)
52 # define CONFIG_SUPPORT_CARD_LED_BASE (CONFIG_SUPPORT_CARD_BASE + 0x00090000)
53 # define CONFIG_SUPPORT_CARD_UART_BASE (CONFIG_SUPPORT_CARD_BASE + 0x000b0000)
56 #if defined(CONFIG_DCC_MICRO_SUPPORT_CARD)
57 # define CONFIG_SUPPORT_CARD_BASE 0x08000000
58 # define CONFIG_SUPPORT_CARD_ETHER_BASE (CONFIG_SUPPORT_CARD_BASE + 0x00000000)
59 # define CONFIG_SUPPORT_CARD_LED_BASE (CONFIG_SUPPORT_CARD_BASE + 0x00401630)
60 # define CONFIG_SUPPORT_CARD_UART_BASE (CONFIG_SUPPORT_CARD_BASE + 0x00200000)
63 #ifdef CONFIG_SYS_NS16550_SERIAL
64 #define CONFIG_SYS_NS16550
65 #define CONFIG_SYS_NS16550_COM1 CONFIG_SUPPORT_CARD_UART_BASE
66 #define CONFIG_SYS_NS16550_CLK 12288000
67 #define CONFIG_SYS_NS16550_REG_SIZE -2
70 /* TODO: move to Kconfig and device tree */
72 #define CONFIG_SYS_NS16550_SERIAL
75 #define CONFIG_SMC911X
77 #define CONFIG_SMC911X_BASE CONFIG_SUPPORT_CARD_ETHER_BASE
78 #define CONFIG_SMC911X_32_BIT
80 #define CONFIG_SYS_MALLOC_F_LEN 0x2000
82 /*-----------------------------------------------------------------------
83 * MMU and Cache Setting
84 *----------------------------------------------------------------------*/
86 /* Comment out the following to enable L1 cache */
87 /* #define CONFIG_SYS_ICACHE_OFF */
88 /* #define CONFIG_SYS_DCACHE_OFF */
90 /* Comment out the following to enable L2 cache */
91 #define CONFIG_UNIPHIER_L2CACHE_ON
93 #define CONFIG_DISPLAY_CPUINFO
94 #define CONFIG_DISPLAY_BOARDINFO
95 #define CONFIG_BOARD_LATE_INIT
97 #define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
99 #define CONFIG_TIMESTAMP
102 #define CONFIG_MTD_DEVICE
105 * uncomment the following to disable FLASH related code.
107 /* #define CONFIG_SYS_NO_FLASH */
109 #define CONFIG_FLASH_CFI_DRIVER
110 #define CONFIG_SYS_FLASH_CFI
112 #define CONFIG_SYS_MAX_FLASH_SECT 256
113 #define CONFIG_SYS_MONITOR_BASE 0
114 #define CONFIG_SYS_FLASH_BASE 0
117 * flash_toggle does not work for out supoort card.
118 * We need to use flash_status_poll.
120 #define CONFIG_SYS_CFI_FLASH_STATUS_POLL
122 #define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */
124 #if defined(CONFIG_PFC_MICRO_SUPPORT_CARD)
125 # define CONFIG_SYS_MAX_FLASH_BANKS 1
126 # define CONFIG_SYS_FLASH_BANKS_LIST {0x00000000}
127 # define CONFIG_SYS_FLASH_BANKS_SIZES {0x02000000}
130 #if defined(CONFIG_DCC_MICRO_SUPPORT_CARD)
131 # define CONFIG_SYS_MAX_FLASH_BANKS 1
132 # define CONFIG_SYS_FLASH_BANKS_LIST {0x04000000}
133 # define CONFIG_SYS_FLASH_BANKS_SIZES {0x04000000}
136 /* serial console configuration */
137 #define CONFIG_BAUDRATE 115200
139 #define CONFIG_SYS_GENERIC_BOARD
141 #if !defined(CONFIG_SPL_BUILD)
142 #define CONFIG_USE_ARCH_MEMSET
143 #define CONFIG_USE_ARCH_MEMCPY
146 #define CONFIG_SYS_LONGHELP /* undef to save memory */
148 #define CONFIG_CMDLINE_EDITING /* add command line history */
149 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
150 /* Print Buffer Size */
151 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
152 #define CONFIG_SYS_MAXARGS 16 /* max number of command */
153 /* Boot Argument Buffer Size */
154 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
156 #define CONFIG_CONS_INDEX 1
159 * For NAND booting the environment is embedded in the U-Boot image. Please take
160 * look at the file board/amcc/canyonlands/u-boot-nand.lds for details.
162 /* #define CONFIG_ENV_IS_IN_NAND */
163 #define CONFIG_ENV_IS_NOWHERE
164 #define CONFIG_ENV_SIZE 0x2000
165 #define CONFIG_ENV_OFFSET 0x0
166 /* #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) */
168 /* Time clock 1MHz */
169 #define CONFIG_SYS_TIMER_RATE 1000000
172 * By default, ARP timeout is 5 sec.
173 * The first ARP request does not seem to work.
174 * So we need to retry ARP request anyway.
175 * We want to shrink the interval until the second ARP request.
177 #define CONFIG_ARP_TIMEOUT 500UL /* 0.5 msec */
179 #define CONFIG_SYS_MAX_NAND_DEVICE 1
180 #define CONFIG_SYS_NAND_MAX_CHIPS 2
181 #define CONFIG_SYS_NAND_ONFI_DETECTION
183 #define CONFIG_NAND_DENALI_ECC_SIZE 1024
185 #define CONFIG_SYS_NAND_REGS_BASE 0x68100000
186 #define CONFIG_SYS_NAND_DATA_BASE 0x68000000
188 #define CONFIG_SYS_NAND_BASE (CONFIG_SYS_NAND_DATA_BASE + 0x10)
190 #define CONFIG_SYS_NAND_USE_FLASH_BBT
191 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
194 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
195 #define CONFIG_CMD_FAT
196 #define CONFIG_FAT_WRITE
197 #define CONFIG_DOS_PARTITION
199 /* memtest works on */
200 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
201 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x01000000)
203 #define CONFIG_BOOTDELAY 3
204 #define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */
205 #define CONFIG_AUTOBOOT_KEYED 1
206 #define CONFIG_AUTOBOOT_PROMPT \
207 "Press SPACE to abort autoboot in %d seconds\n", bootdelay
208 #define CONFIG_AUTOBOOT_DELAY_STR "d"
209 #define CONFIG_AUTOBOOT_STOP_STR " "
212 * Network Configuration
214 #define CONFIG_ETHADDR 00:21:83:24:00:00
215 #define CONFIG_SERVERIP 192.168.11.1
216 #define CONFIG_IPADDR 192.168.11.10
217 #define CONFIG_GATEWAYIP 192.168.11.1
218 #define CONFIG_NETMASK 255.255.255.0
220 #define CONFIG_LOADADDR 0x84000000
221 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
222 #define CONFIG_BOOTFILE "fit.itb"
224 #define CONFIG_CMDLINE_EDITING /* add command line history */
226 #define CONFIG_BOOTCOMMAND "run $bootmode"
228 #define CONFIG_ROOTPATH "/nfs/root/path"
229 #define CONFIG_NFSBOOTCOMMAND \
230 "setenv bootargs $bootargs root=/dev/nfs rw " \
231 "nfsroot=$serverip:$rootpath " \
232 "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off;" \
235 #define CONFIG_BOOTARGS " user_debug=0x1f init=/sbin/init"
237 #define CONFIG_EXTRA_ENV_SETTINGS \
239 "image_offset=0x00080000\0" \
240 "image_size=0x00f00000\0" \
242 "norboot=run add_default_bootargs;" \
243 "bootm $image_offset\0" \
244 "nandboot=run add_default_bootargs;" \
245 "nand read $loadaddr $image_offset $image_size;" \
247 "add_default_bootargs=setenv bootargs $bootargs" \
248 " console=ttyS0,$baudrate\0" \
250 /* Open Firmware flat tree */
251 #define CONFIG_OF_LIBFDT
253 #define CONFIG_HAVE_ARM_SECURE
255 /* Memory Size & Mapping */
256 #define CONFIG_SYS_SDRAM_BASE CONFIG_SDRAM0_BASE
258 #if CONFIG_SDRAM0_BASE + CONFIG_SDRAM0_SIZE >= CONFIG_SDRAM1_BASE
259 /* Thre is no memory hole */
260 #define CONFIG_NR_DRAM_BANKS 1
261 #define CONFIG_SYS_SDRAM_SIZE (CONFIG_SDRAM0_SIZE + CONFIG_SDRAM1_SIZE)
263 #define CONFIG_NR_DRAM_BANKS 2
264 #define CONFIG_SYS_SDRAM_SIZE (CONFIG_SDRAM0_SIZE)
267 #define CONFIG_SYS_TEXT_BASE 0x84000000
269 #if defined(CONFIG_MACH_PH1_LD4) || defined(CONFIG_MACH_PH1_SLD8)
270 #define CONFIG_SPL_TEXT_BASE 0x00040000
272 #if defined(CONFIG_MACH_PH1_PRO4)
273 #define CONFIG_SPL_TEXT_BASE 0x00100000
276 #define CONFIG_BOARD_POSTCLK_INIT
278 #ifndef CONFIG_SPL_BUILD
279 #define CONFIG_SKIP_LOWLEVEL_INIT
282 #define CONFIG_SYS_SPL_MALLOC_START (0x0ff00000)
283 #define CONFIG_SYS_SPL_MALLOC_SIZE (0x00004000)
285 #define CONFIG_SYS_INIT_SP_ADDR (0x0ff08000)
287 #define CONFIG_SPL_FRAMEWORK
288 #define CONFIG_SPL_NAND_SUPPORT
290 #define CONFIG_SPL_LIBCOMMON_SUPPORT /* for mem_malloc_init */
291 #define CONFIG_SPL_LIBGENERIC_SUPPORT
293 #define CONFIG_SPL_BOARD_INIT
295 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x10000
297 #endif /* __CONFIG_UNIPHIER_COMMON_H__ */