include/configs/uniphier.h

   1 /*
   2  * Copyright (C) 2012-2015 Panasonic Corporation
   3  * Copyright (C) 2015-2016 Socionext Inc.
   4  *   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
   5  *
   6  * SPDX-License-Identifier:     GPL-2.0+
   7  */
   8
   9 /* U-Boot - Common settings for UniPhier Family */
  10
  11 #ifndef __CONFIG_UNIPHIER_COMMON_H__
  12 #define __CONFIG_UNIPHIER_COMMON_H__
  13
  14 #define CONFIG_ARMV7_PSCI_1_0
  15
  16 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS  10
  17
  18 /*-----------------------------------------------------------------------
  19  * MMU and Cache Setting
  20  *----------------------------------------------------------------------*/
  21
  22 /* Comment out the following to enable L1 cache */
  23 /* #define CONFIG_SYS_ICACHE_OFF */
  24 /* #define CONFIG_SYS_DCACHE_OFF */
  25
  26 #define CONFIG_SYS_MALLOC_LEN           (4 * 1024 * 1024)
  27
  28 #define CONFIG_TIMESTAMP
  29
  30 /* FLASH related */
  31 #define CONFIG_MTD_DEVICE
  32
  33 #define CONFIG_SMC911X_32_BIT
  34 /* dummy: referenced by examples/standalone/smc911x_eeprom.c */
  35 #define CONFIG_SMC911X_BASE     0
  36
  37 #ifdef CONFIG_MICRO_SUPPORT_CARD
  38 #define CONFIG_SMC911X
  39 #endif
  40
  41 #define CONFIG_FLASH_CFI_DRIVER
  42 #define CONFIG_SYS_FLASH_CFI
  43
  44 #define CONFIG_SYS_MAX_FLASH_SECT       256
  45 #define CONFIG_SYS_MONITOR_BASE         0
  46 #define CONFIG_SYS_MONITOR_LEN          0x00080000      /* 512KB */
  47 #define CONFIG_SYS_FLASH_BASE           0
  48
  49 /*
  50  * flash_toggle does not work for our support card.
  51  * We need to use flash_status_poll.
  52  */
  53 #define CONFIG_SYS_CFI_FLASH_STATUS_POLL
  54
  55 #define CONFIG_FLASH_SHOW_PROGRESS      45 /* count down from 45/5: 9..1 */
  56
  57 #define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 1
  58
  59 /* serial console configuration */
  60
  61 #define CONFIG_SYS_LONGHELP             /* undef to save memory */
  62
  63 #define CONFIG_CMDLINE_EDITING          /* add command line history     */
  64 #define CONFIG_SYS_CBSIZE               1024    /* Console I/O Buffer Size */
  65 /* Print Buffer Size */
  66 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
  67 #define CONFIG_SYS_MAXARGS              16      /* max number of command */
  68 /* Boot Argument Buffer Size */
  69 #define CONFIG_SYS_BARGSIZE             (CONFIG_SYS_CBSIZE)
  70
  71 #define CONFIG_CONS_INDEX               1
  72
  73 /* #define CONFIG_ENV_IS_NOWHERE */
  74 /* #define CONFIG_ENV_IS_IN_NAND */
  75 #define CONFIG_ENV_IS_IN_MMC
  76 #define CONFIG_ENV_OFFSET                       0x100000
  77 #define CONFIG_ENV_SIZE                         0x2000
  78 /* #define CONFIG_ENV_OFFSET_REDUND     (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) */
  79
  80 #define CONFIG_SYS_MMC_ENV_DEV          0
  81 #define CONFIG_SYS_MMC_ENV_PART         1
  82
  83 #ifdef CONFIG_ARMV8_MULTIENTRY
  84 #define CPU_RELEASE_ADDR                        0x80000000
  85 #define COUNTER_FREQUENCY                       50000000
  86 #define CONFIG_GICV3
  87 #define GICD_BASE                               0x5fe00000
  88 #if defined(CONFIG_ARCH_UNIPHIER_LD11)
  89 #define GICR_BASE                               0x5fe40000
  90 #elif defined(CONFIG_ARCH_UNIPHIER_LD20)
  91 #define GICR_BASE                               0x5fe80000
  92 #endif
  93 #elif !defined(CONFIG_ARM64)
  94 /* Time clock 1MHz */
  95 #define CONFIG_SYS_TIMER_RATE                   1000000
  96 #endif
  97
  98 #define CONFIG_SYS_MAX_NAND_DEVICE                      1
  99 #define CONFIG_SYS_NAND_MAX_CHIPS                       2
 100 #define CONFIG_SYS_NAND_ONFI_DETECTION
 101
 102 #define CONFIG_NAND_DENALI_ECC_SIZE                     1024
 103
 104 #ifdef CONFIG_ARCH_UNIPHIER_SLD3
 105 #define CONFIG_SYS_NAND_REGS_BASE                       0xf8100000
 106 #define CONFIG_SYS_NAND_DATA_BASE                       0xf8000000
 107 #else
 108 #define CONFIG_SYS_NAND_REGS_BASE                       0x68100000
 109 #define CONFIG_SYS_NAND_DATA_BASE                       0x68000000
 110 #endif
 111
 112 #define CONFIG_SYS_NAND_BASE            (CONFIG_SYS_NAND_DATA_BASE + 0x10)
 113
 114 #define CONFIG_SYS_NAND_USE_FLASH_BBT
 115 #define CONFIG_SYS_NAND_BAD_BLOCK_POS                   0
 116
 117 /* USB */
 118 #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS      4
 119 #define CONFIG_FAT_WRITE
 120
 121 /* SD/MMC */
 122 #define CONFIG_SUPPORT_EMMC_BOOT
 123
 124 /* memtest works on */
 125 #define CONFIG_SYS_MEMTEST_START        CONFIG_SYS_SDRAM_BASE
 126 #define CONFIG_SYS_MEMTEST_END          (CONFIG_SYS_SDRAM_BASE + 0x01000000)
 127
 128 /*
 129  * Network Configuration
 130  */
 131 #define CONFIG_SERVERIP                 192.168.11.1
 132 #define CONFIG_IPADDR                   192.168.11.10
 133 #define CONFIG_GATEWAYIP                192.168.11.1
 134 #define CONFIG_NETMASK                  255.255.255.0
 135
 136 #define CONFIG_LOADADDR                 0x84000000
 137 #define CONFIG_SYS_LOAD_ADDR            CONFIG_LOADADDR
 138
 139 #define CONFIG_CMDLINE_EDITING          /* add command line history     */
 140
 141 #if defined(CONFIG_ARM64) && !defined(CONFIG_ARMV8_MULTIENTRY)
 142 /* ARM Trusted Firmware */
 143 #define BOOT_IMAGES \
 144         "second_image=unph_bl.bin\0" \
 145         "third_image=fip.bin\0"
 146 #else
 147 #define BOOT_IMAGES \
 148         "second_image=u-boot-spl.bin\0" \
 149         "third_image=u-boot.bin\0"
 150 #endif
 151
 152 #define CONFIG_BOOTCOMMAND              "run $bootmode"
 153
 154 #define CONFIG_ROOTPATH                 "/nfs/root/path"
 155 #define CONFIG_NFSBOOTCOMMAND                                           \
 156         "setenv bootargs $bootargs root=/dev/nfs rw "                   \
 157         "nfsroot=$serverip:$rootpath "                                  \
 158         "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off;" \
 159                 "run __nfsboot"
 160
 161 #ifdef CONFIG_FIT
 162 #define CONFIG_BOOTFILE                 "fitImage"
 163 #define LINUXBOOT_ENV_SETTINGS \
 164         "fit_addr=0x00100000\0" \
 165         "fit_addr_r=0x84100000\0" \
 166         "fit_size=0x00f00000\0" \
 167         "norboot=setexpr fit_addr $nor_base + $fit_addr &&" \
 168                 "bootm $fit_addr\0" \
 169         "nandboot=nand read $fit_addr_r $fit_addr $fit_size &&" \
 170                 "bootm $fit_addr_r\0" \
 171         "tftpboot=tftpboot $fit_addr_r $bootfile &&" \
 172                 "bootm $fit_addr_r\0" \
 173         "__nfsboot=run tftpboot\0"
 174 #else
 175 #ifdef CONFIG_ARM64
 176 #define CONFIG_BOOTFILE                 "Image.gz"
 177 #define LINUXBOOT_CMD                   "booti"
 178 #define KERNEL_ADDR_LOAD                "kernel_addr_load=0x84200000\0"
 179 #define KERNEL_ADDR_R                   "kernel_addr_r=0x80080000\0"
 180 #else
 181 #define CONFIG_BOOTFILE                 "zImage"
 182 #define LINUXBOOT_CMD                   "bootz"
 183 #define KERNEL_ADDR_LOAD                "kernel_addr_load=0x80208000\0"
 184 #define KERNEL_ADDR_R                   "kernel_addr_r=0x80208000\0"
 185 #endif
 186 #define LINUXBOOT_ENV_SETTINGS \
 187         "fdt_addr=0x00100000\0" \
 188         "fdt_addr_r=0x84100000\0" \
 189         "fdt_size=0x00008000\0" \
 190         "kernel_addr=0x00200000\0" \
 191         KERNEL_ADDR_LOAD \
 192         KERNEL_ADDR_R \
 193         "kernel_size=0x00800000\0" \
 194         "ramdisk_addr=0x00a00000\0" \
 195         "ramdisk_addr_r=0x84a00000\0" \
 196         "ramdisk_size=0x00600000\0" \
 197         "ramdisk_file=rootfs.cpio.uboot\0" \
 198         "boot_common=setexpr bootm_low $kernel_addr_r '&' fe000000 && " \
 199                 "if test $kernel_addr_load = $kernel_addr_r; then " \
 200                         "true; " \
 201                 "else " \
 202                         "unzip $kernel_addr_load $kernel_addr_r; " \
 203                 "fi && " \
 204                 LINUXBOOT_CMD " $kernel_addr_r $ramdisk_addr_r $fdt_addr_r\0" \
 205         "norboot=setexpr kernel_addr_nor $nor_base + $kernel_addr && " \
 206                 "setexpr kernel_size_div4 $kernel_size / 4 && " \
 207                 "cp $kernel_addr_nor $kernel_addr_load $kernel_size_div4 && " \
 208                 "setexpr ramdisk_addr_nor $nor_base + $ramdisk_addr && " \
 209                 "setexpr ramdisk_size_div4 $ramdisk_size / 4 && " \
 210                 "cp $ramdisk_addr_nor $ramdisk_addr_r $ramdisk_size_div4 && " \
 211                 "setexpr fdt_addr_nor $nor_base + $fdt_addr && " \
 212                 "setexpr fdt_size_div4 $fdt_size / 4 && " \
 213                 "cp $fdt_addr_nor $fdt_addr_r $fdt_size_div4 && " \
 214                 "run boot_common\0" \
 215         "nandboot=nand read $kernel_addr_load $kernel_addr $kernel_size && " \
 216                 "nand read $ramdisk_addr_r $ramdisk_addr $ramdisk_size &&" \
 217                 "nand read $fdt_addr_r $fdt_addr $fdt_size &&" \
 218                 "run boot_common\0" \
 219         "tftpboot=tftpboot $kernel_addr_load $bootfile && " \
 220                 "tftpboot $ramdisk_addr_r $ramdisk_file &&" \
 221                 "tftpboot $fdt_addr_r $fdt_file &&" \
 222                 "run boot_common\0" \
 223         "__nfsboot=tftpboot $kernel_addr_load $bootfile && " \
 224                 "tftpboot $fdt_addr_r $fdt_file &&" \
 225                 "setenv ramdisk_addr_r - &&" \
 226                 "run boot_common\0"
 227 #endif
 228
 229 #define CONFIG_EXTRA_ENV_SETTINGS                               \
 230         "netdev=eth0\0"                                         \
 231         "verify=n\0"                                            \
 232         "initrd_high=0xffffffffffffffff\0"                      \
 233         "nor_base=0x42000000\0"                                 \
 234         "sramupdate=setexpr tmp_addr $nor_base + 0x50000 &&"    \
 235                 "tftpboot $tmp_addr $second_image && " \
 236                 "setexpr tmp_addr $nor_base + 0x70000 && " \
 237                 "tftpboot $tmp_addr $third_image\0" \
 238         "emmcupdate=mmcsetn &&"                                 \
 239                 "mmc partconf $mmc_first_dev 0 1 1 &&"          \
 240                 "tftpboot $second_image && " \
 241                 "mmc write $loadaddr 0 100 && " \
 242                 "tftpboot $third_image && " \
 243                 "mmc write $loadaddr 100 700\0" \
 244         "nandupdate=nand erase 0 0x00100000 &&"                 \
 245                 "tftpboot $second_image && " \
 246                 "nand write $loadaddr 0 0x00020000 && " \
 247                 "tftpboot $third_image && " \
 248                 "nand write $loadaddr 0x00020000 0x000e0000\0" \
 249         BOOT_IMAGES \
 250         LINUXBOOT_ENV_SETTINGS
 251
 252 #define CONFIG_SYS_BOOTMAPSZ                    0x20000000
 253
 254 #define CONFIG_SYS_SDRAM_BASE           0x80000000
 255 #define CONFIG_NR_DRAM_BANKS            3
 256 /* for LD20; the last 64 byte is used for dynamic DDR PHY training */
 257 #define CONFIG_SYS_MEM_TOP_HIDE         64
 258
 259 #define CONFIG_PANIC_HANG
 260
 261 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_TEXT_BASE)
 262
 263 /* only for SPL */
 264 #if defined(CONFIG_ARM64)
 265 #define CONFIG_SPL_TEXT_BASE            0x30000000
 266 #elif defined(CONFIG_ARCH_UNIPHIER_SLD3) || \
 267         defined(CONFIG_ARCH_UNIPHIER_LD4) || \
 268         defined(CONFIG_ARCH_UNIPHIER_SLD8)
 269 #define CONFIG_SPL_TEXT_BASE            0x00040000
 270 #else
 271 #define CONFIG_SPL_TEXT_BASE            0x00100000
 272 #endif
 273
 274 #if defined(CONFIG_ARCH_UNIPHIER_LD11)
 275 #define CONFIG_SPL_STACK                (0x30014c00)
 276 #elif defined(CONFIG_ARCH_UNIPHIER_LD20)
 277 #define CONFIG_SPL_STACK                (0x3001c000)
 278 #else
 279 #define CONFIG_SPL_STACK                (0x00100000)
 280 #endif
 281
 282 #define CONFIG_SPL_FRAMEWORK
 283 #ifdef CONFIG_ARM64
 284 #define CONFIG_SPL_BOARD_LOAD_IMAGE
 285 #endif
 286
 287 #define CONFIG_SPL_BOARD_INIT
 288
 289 #define CONFIG_SYS_NAND_U_BOOT_OFFS             0x20000
 290
 291 /* subtract sizeof(struct image_header) */
 292 #define CONFIG_SYS_UBOOT_BASE                   (0x70000 - 0x40)
 293
 294 #define CONFIG_SPL_TARGET                       "u-boot-with-spl.bin"
 295 #define CONFIG_SPL_MAX_FOOTPRINT                0x10000
 296 #if defined(CONFIG_ARCH_UNIPHIER_LD20)
 297 #define CONFIG_SPL_MAX_SIZE                     0x14000
 298 #else
 299 #define CONFIG_SPL_MAX_SIZE                     0x10000
 300 #endif
 301 #if defined(CONFIG_ARCH_UNIPHIER_LD11)
 302 #define CONFIG_SPL_BSS_START_ADDR               0x30012000
 303 #elif defined(CONFIG_ARCH_UNIPHIER_LD20)
 304 #define CONFIG_SPL_BSS_START_ADDR               0x30016000
 305 #endif
 306 #define CONFIG_SPL_BSS_MAX_SIZE                 0x2000
 307
 308 #define CONFIG_SPL_PAD_TO                       0x20000
 309
 310 #endif /* __CONFIG_UNIPHIER_COMMON_H__ */