2 * Copyright (C) 2012-2015 Panasonic Corporation
3 * Copyright (C) 2015-2016 Socionext Inc.
4 * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
6 * SPDX-License-Identifier: GPL-2.0+
9 /* U-Boot - Common settings for UniPhier Family */
11 #ifndef __CONFIG_UNIPHIER_COMMON_H__
12 #define __CONFIG_UNIPHIER_COMMON_H__
14 #define CONFIG_ARMV7_PSCI
15 #define CONFIG_ARMV7_PSCI_NR_CPUS 4
17 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10
19 #define CONFIG_SMC911X
21 /* dummy: referenced by examples/standalone/smc911x_eeprom.c */
22 #define CONFIG_SMC911X_BASE 0
23 #define CONFIG_SMC911X_32_BIT
25 /*-----------------------------------------------------------------------
26 * MMU and Cache Setting
27 *----------------------------------------------------------------------*/
29 /* Comment out the following to enable L1 cache */
30 /* #define CONFIG_SYS_ICACHE_OFF */
31 /* #define CONFIG_SYS_DCACHE_OFF */
33 #define CONFIG_DISPLAY_CPUINFO
34 #define CONFIG_DISPLAY_BOARDINFO
35 #define CONFIG_MISC_INIT_F
36 #define CONFIG_BOARD_EARLY_INIT_F
37 #define CONFIG_BOARD_EARLY_INIT_R
38 #define CONFIG_BOARD_LATE_INIT
40 #define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
42 #define CONFIG_TIMESTAMP
45 #define CONFIG_MTD_DEVICE
48 * uncomment the following to disable FLASH related code.
50 /* #define CONFIG_SYS_NO_FLASH */
52 #define CONFIG_FLASH_CFI_DRIVER
53 #define CONFIG_SYS_FLASH_CFI
55 #define CONFIG_SYS_MAX_FLASH_SECT 256
56 #define CONFIG_SYS_MONITOR_BASE 0
57 #define CONFIG_SYS_MONITOR_LEN 0x00080000 /* 512KB */
58 #define CONFIG_SYS_FLASH_BASE 0
61 * flash_toggle does not work for out supoort card.
62 * We need to use flash_status_poll.
64 #define CONFIG_SYS_CFI_FLASH_STATUS_POLL
66 #define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */
68 #define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 1
70 /* serial console configuration */
71 #define CONFIG_BAUDRATE 115200
73 #if !defined(CONFIG_SPL_BUILD) && !defined(CONFIG_ARM64)
74 #define CONFIG_USE_ARCH_MEMSET
75 #define CONFIG_USE_ARCH_MEMCPY
78 #define CONFIG_SYS_LONGHELP /* undef to save memory */
80 #define CONFIG_CMDLINE_EDITING /* add command line history */
81 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
82 /* Print Buffer Size */
83 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
84 #define CONFIG_SYS_MAXARGS 16 /* max number of command */
85 /* Boot Argument Buffer Size */
86 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
88 #define CONFIG_CONS_INDEX 1
90 /* #define CONFIG_ENV_IS_NOWHERE */
91 /* #define CONFIG_ENV_IS_IN_NAND */
92 #define CONFIG_ENV_IS_IN_MMC
93 #define CONFIG_ENV_OFFSET 0x80000
94 #define CONFIG_ENV_SIZE 0x2000
95 /* #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) */
97 #define CONFIG_SYS_MMC_ENV_DEV 0
98 #define CONFIG_SYS_MMC_ENV_PART 1
101 #define CPU_RELEASE_ADDR 0x80000000
102 #define COUNTER_FREQUENCY 50000000
104 #define GICD_BASE 0x5fe00000
105 #if defined(CONFIG_ARCH_UNIPHIER_LD11)
106 #define GICR_BASE 0x5fe40000
107 #elif defined(CONFIG_ARCH_UNIPHIER_LD20)
108 #define GICR_BASE 0x5fe80000
111 /* Time clock 1MHz */
112 #define CONFIG_SYS_TIMER_RATE 1000000
116 #define CONFIG_SYS_MAX_NAND_DEVICE 1
117 #define CONFIG_SYS_NAND_MAX_CHIPS 2
118 #define CONFIG_SYS_NAND_ONFI_DETECTION
120 #define CONFIG_NAND_DENALI_ECC_SIZE 1024
122 #ifdef CONFIG_ARCH_UNIPHIER_SLD3
123 #define CONFIG_SYS_NAND_REGS_BASE 0xf8100000
124 #define CONFIG_SYS_NAND_DATA_BASE 0xf8000000
126 #define CONFIG_SYS_NAND_REGS_BASE 0x68100000
127 #define CONFIG_SYS_NAND_DATA_BASE 0x68000000
130 #define CONFIG_SYS_NAND_BASE (CONFIG_SYS_NAND_DATA_BASE + 0x10)
132 #define CONFIG_SYS_NAND_USE_FLASH_BBT
133 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
136 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
137 #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 4
138 #define CONFIG_FAT_WRITE
139 #define CONFIG_DOS_PARTITION
142 #define CONFIG_SUPPORT_EMMC_BOOT
143 #define CONFIG_GENERIC_MMC
145 /* memtest works on */
146 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
147 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x01000000)
150 * Network Configuration
152 #define CONFIG_SERVERIP 192.168.11.1
153 #define CONFIG_IPADDR 192.168.11.10
154 #define CONFIG_GATEWAYIP 192.168.11.1
155 #define CONFIG_NETMASK 255.255.255.0
157 #define CONFIG_LOADADDR 0x84000000
158 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
160 #define CONFIG_CMDLINE_EDITING /* add command line history */
162 #define CONFIG_BOOTCOMMAND "run $bootmode"
164 #define CONFIG_ROOTPATH "/nfs/root/path"
165 #define CONFIG_NFSBOOTCOMMAND \
166 "setenv bootargs $bootargs root=/dev/nfs rw " \
167 "nfsroot=$serverip:$rootpath " \
168 "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off;" \
172 #define CONFIG_BOOTFILE "fitImage"
173 #define LINUXBOOT_ENV_SETTINGS \
174 "fit_addr=0x00100000\0" \
175 "fit_addr_r=0x84100000\0" \
176 "fit_size=0x00f00000\0" \
177 "norboot=setexpr fit_addr $nor_base + $fit_addr &&" \
178 "bootm $fit_addr\0" \
179 "nandboot=nand read $fit_addr_r $fit_addr $fit_size &&" \
180 "bootm $fit_addr_r\0" \
181 "tftpboot=tftpboot $fit_addr_r $bootfile &&" \
182 "bootm $fit_addr_r\0" \
183 "__nfsboot=run tftpboot\0"
186 #define CONFIG_BOOTFILE "Image"
187 #define LINUXBOOT_CMD "booti"
188 #define KERNEL_ADDR_R "kernel_addr_r=0x80080000\0"
189 #define KERNEL_SIZE "kernel_size=0x00c00000\0"
190 #define RAMDISK_ADDR "ramdisk_addr=0x00e00000\0"
192 #define CONFIG_BOOTFILE "zImage"
193 #define LINUXBOOT_CMD "bootz"
194 #define KERNEL_ADDR_R "kernel_addr_r=0x80208000\0"
195 #define KERNEL_SIZE "kernel_size=0x00800000\0"
196 #define RAMDISK_ADDR "ramdisk_addr=0x00a00000\0"
198 #define LINUXBOOT_ENV_SETTINGS \
199 "fdt_addr=0x00100000\0" \
200 "fdt_addr_r=0x84100000\0" \
201 "fdt_size=0x00008000\0" \
202 "kernel_addr=0x00200000\0" \
206 "ramdisk_addr_r=0x84a00000\0" \
207 "ramdisk_size=0x00600000\0" \
208 "ramdisk_file=rootfs.cpio.uboot\0" \
209 "boot_common=setexpr bootm_low $kernel_addr_r '&' fe000000 &&" \
210 LINUXBOOT_CMD " $kernel_addr_r $ramdisk_addr_r $fdt_addr_r\0" \
211 "norboot=setexpr kernel_addr $nor_base + $kernel_addr &&" \
212 "setexpr kernel_size $kernel_size / 4 &&" \
213 "cp $kernel_addr $kernel_addr_r $kernel_size &&" \
214 "setexpr ramdisk_addr_r $nor_base + $ramdisk_addr &&" \
215 "setexpr fdt_addr_r $nor_base + $fdt_addr &&" \
216 "run boot_common\0" \
217 "nandboot=nand read $kernel_addr_r $kernel_addr $kernel_size &&" \
218 "nand read $ramdisk_addr_r $ramdisk_addr $ramdisk_size &&" \
219 "nand read $fdt_addr_r $fdt_addr $fdt_size &&" \
220 "run boot_common\0" \
221 "tftpboot=tftpboot $kernel_addr_r $bootfile &&" \
222 "tftpboot $ramdisk_addr_r $ramdisk_file &&" \
223 "tftpboot $fdt_addr_r $fdt_file &&" \
224 "run boot_common\0" \
225 "__nfsboot=tftpboot $kernel_addr_r $bootfile &&" \
226 "tftpboot $fdt_addr_r $fdt_file &&" \
227 "setenv ramdisk_addr_r - &&" \
231 #define CONFIG_EXTRA_ENV_SETTINGS \
234 "nor_base=0x42000000\0" \
235 "sramupdate=setexpr tmp_addr $nor_base + 0x50000 &&" \
236 "tftpboot $tmp_addr u-boot-spl.bin &&" \
237 "setexpr tmp_addr $nor_base + 0x60000 &&" \
238 "tftpboot $tmp_addr u-boot.bin\0" \
239 "emmcupdate=mmcsetn &&" \
240 "mmc partconf $mmc_first_dev 0 1 1 &&" \
241 "tftpboot u-boot-spl.bin &&" \
242 "mmc write $loadaddr 0 80 &&" \
243 "tftpboot u-boot.bin &&" \
244 "mmc write $loadaddr 80 780\0" \
245 "nandupdate=nand erase 0 0x00100000 &&" \
246 "tftpboot u-boot-spl.bin &&" \
247 "nand write $loadaddr 0 0x00010000 &&" \
248 "tftpboot u-boot.bin &&" \
249 "nand write $loadaddr 0x00010000 0x000f0000\0" \
250 LINUXBOOT_ENV_SETTINGS
252 #define CONFIG_SYS_BOOTMAPSZ 0x20000000
254 #define CONFIG_SYS_SDRAM_BASE 0x80000000
255 #define CONFIG_NR_DRAM_BANKS 2
256 /* for LD20; the last 64 byte is used for dynamic DDR PHY training */
257 #define CONFIG_SYS_MEM_TOP_HIDE 64
259 #if defined(CONFIG_ARM64)
260 #define CONFIG_SPL_TEXT_BASE 0x30000000
261 #elif defined(CONFIG_ARCH_UNIPHIER_SLD3) || \
262 defined(CONFIG_ARCH_UNIPHIER_LD4) || \
263 defined(CONFIG_ARCH_UNIPHIER_SLD8)
264 #define CONFIG_SPL_TEXT_BASE 0x00040000
266 #define CONFIG_SPL_TEXT_BASE 0x00100000
269 #if defined(CONFIG_ARCH_UNIPHIER_LD11)
270 #define CONFIG_SPL_STACK (0x30014c00)
271 #elif defined(CONFIG_ARCH_UNIPHIER_LD20)
272 #define CONFIG_SPL_STACK (0x3001c000)
274 #define CONFIG_SPL_STACK (0x00100000)
276 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE)
278 #define CONFIG_PANIC_HANG
280 #define CONFIG_SPL_FRAMEWORK
281 #define CONFIG_SPL_SERIAL_SUPPORT
282 #define CONFIG_SPL_NOR_SUPPORT
284 #define CONFIG_SPL_BOARD_LOAD_IMAGE
286 #define CONFIG_SPL_NAND_SUPPORT
287 #define CONFIG_SPL_MMC_SUPPORT
290 #define CONFIG_SPL_LIBCOMMON_SUPPORT /* for mem_malloc_init */
291 #define CONFIG_SPL_LIBGENERIC_SUPPORT
293 #define CONFIG_SPL_BOARD_INIT
295 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x10000
297 /* subtract sizeof(struct image_header) */
298 #define CONFIG_SYS_UBOOT_BASE (0x60000 - 0x40)
299 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x80
301 #define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
302 #define CONFIG_SPL_MAX_FOOTPRINT 0x10000
303 #define CONFIG_SPL_MAX_SIZE 0x10000
304 #if defined(CONFIG_ARCH_UNIPHIER_LD11)
305 #define CONFIG_SPL_BSS_START_ADDR 0x30012000
306 #elif defined(CONFIG_ARCH_UNIPHIER_LD20)
307 #define CONFIG_SPL_BSS_START_ADDR 0x30016000
309 #define CONFIG_SPL_BSS_MAX_SIZE 0x2000
311 #endif /* __CONFIG_UNIPHIER_COMMON_H__ */