ARM: uniphier: detect RAM size by decoding HW register instead of DT
[platform/kernel/u-boot.git] / include / configs / uniphier.h
1 /*
2  * Copyright (C) 2012-2015 Panasonic Corporation
3  * Copyright (C) 2015-2016 Socionext Inc.
4  *   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
5  *
6  * SPDX-License-Identifier:     GPL-2.0+
7  */
8
9 /* U-Boot - Common settings for UniPhier Family */
10
11 #ifndef __CONFIG_UNIPHIER_COMMON_H__
12 #define __CONFIG_UNIPHIER_COMMON_H__
13
14 #define CONFIG_ARMV7_PSCI_1_0
15
16 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS  10
17
18 /*-----------------------------------------------------------------------
19  * MMU and Cache Setting
20  *----------------------------------------------------------------------*/
21
22 /* Comment out the following to enable L1 cache */
23 /* #define CONFIG_SYS_ICACHE_OFF */
24 /* #define CONFIG_SYS_DCACHE_OFF */
25
26 #define CONFIG_SYS_MALLOC_LEN           (4 * 1024 * 1024)
27
28 #define CONFIG_TIMESTAMP
29
30 /* FLASH related */
31 #define CONFIG_MTD_DEVICE
32
33 #define CONFIG_SMC911X_32_BIT
34 /* dummy: referenced by examples/standalone/smc911x_eeprom.c */
35 #define CONFIG_SMC911X_BASE     0
36
37 #ifdef CONFIG_MICRO_SUPPORT_CARD
38 #define CONFIG_SMC911X
39 #else
40 #define CONFIG_SYS_NO_FLASH
41 #endif
42
43 #define CONFIG_FLASH_CFI_DRIVER
44 #define CONFIG_SYS_FLASH_CFI
45
46 #define CONFIG_SYS_MAX_FLASH_SECT       256
47 #define CONFIG_SYS_MONITOR_BASE         0
48 #define CONFIG_SYS_MONITOR_LEN          0x00080000      /* 512KB */
49 #define CONFIG_SYS_FLASH_BASE           0
50
51 /*
52  * flash_toggle does not work for our support card.
53  * We need to use flash_status_poll.
54  */
55 #define CONFIG_SYS_CFI_FLASH_STATUS_POLL
56
57 #define CONFIG_FLASH_SHOW_PROGRESS      45 /* count down from 45/5: 9..1 */
58
59 #define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 1
60
61 /* serial console configuration */
62 #define CONFIG_BAUDRATE                 115200
63
64 #define CONFIG_SYS_LONGHELP             /* undef to save memory */
65
66 #define CONFIG_CMDLINE_EDITING          /* add command line history     */
67 #define CONFIG_SYS_CBSIZE               1024    /* Console I/O Buffer Size */
68 /* Print Buffer Size */
69 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
70 #define CONFIG_SYS_MAXARGS              16      /* max number of command */
71 /* Boot Argument Buffer Size */
72 #define CONFIG_SYS_BARGSIZE             (CONFIG_SYS_CBSIZE)
73
74 #define CONFIG_CONS_INDEX               1
75
76 /* #define CONFIG_ENV_IS_NOWHERE */
77 /* #define CONFIG_ENV_IS_IN_NAND */
78 #define CONFIG_ENV_IS_IN_MMC
79 #define CONFIG_ENV_OFFSET                       0x80000
80 #define CONFIG_ENV_SIZE                         0x2000
81 /* #define CONFIG_ENV_OFFSET_REDUND     (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) */
82
83 #define CONFIG_SYS_MMC_ENV_DEV          0
84 #define CONFIG_SYS_MMC_ENV_PART         1
85
86 #ifdef CONFIG_ARMV8_MULTIENTRY
87 #define CPU_RELEASE_ADDR                        0x80000000
88 #define COUNTER_FREQUENCY                       50000000
89 #define CONFIG_GICV3
90 #define GICD_BASE                               0x5fe00000
91 #if defined(CONFIG_ARCH_UNIPHIER_LD11)
92 #define GICR_BASE                               0x5fe40000
93 #elif defined(CONFIG_ARCH_UNIPHIER_LD20)
94 #define GICR_BASE                               0x5fe80000
95 #endif
96 #elif !defined(CONFIG_ARM64)
97 /* Time clock 1MHz */
98 #define CONFIG_SYS_TIMER_RATE                   1000000
99 #endif
100
101
102 #define CONFIG_SYS_MAX_NAND_DEVICE                      1
103 #define CONFIG_SYS_NAND_MAX_CHIPS                       2
104 #define CONFIG_SYS_NAND_ONFI_DETECTION
105
106 #define CONFIG_NAND_DENALI_ECC_SIZE                     1024
107
108 #ifdef CONFIG_ARCH_UNIPHIER_SLD3
109 #define CONFIG_SYS_NAND_REGS_BASE                       0xf8100000
110 #define CONFIG_SYS_NAND_DATA_BASE                       0xf8000000
111 #else
112 #define CONFIG_SYS_NAND_REGS_BASE                       0x68100000
113 #define CONFIG_SYS_NAND_DATA_BASE                       0x68000000
114 #endif
115
116 #define CONFIG_SYS_NAND_BASE            (CONFIG_SYS_NAND_DATA_BASE + 0x10)
117
118 #define CONFIG_SYS_NAND_USE_FLASH_BBT
119 #define CONFIG_SYS_NAND_BAD_BLOCK_POS                   0
120
121 /* USB */
122 #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS      4
123 #define CONFIG_FAT_WRITE
124
125 /* SD/MMC */
126 #define CONFIG_SUPPORT_EMMC_BOOT
127 #define CONFIG_GENERIC_MMC
128
129 /* memtest works on */
130 #define CONFIG_SYS_MEMTEST_START        CONFIG_SYS_SDRAM_BASE
131 #define CONFIG_SYS_MEMTEST_END          (CONFIG_SYS_SDRAM_BASE + 0x01000000)
132
133 /*
134  * Network Configuration
135  */
136 #define CONFIG_SERVERIP                 192.168.11.1
137 #define CONFIG_IPADDR                   192.168.11.10
138 #define CONFIG_GATEWAYIP                192.168.11.1
139 #define CONFIG_NETMASK                  255.255.255.0
140
141 #define CONFIG_LOADADDR                 0x84000000
142 #define CONFIG_SYS_LOAD_ADDR            CONFIG_LOADADDR
143
144 #define CONFIG_CMDLINE_EDITING          /* add command line history     */
145
146 #define CONFIG_BOOTCOMMAND              "run $bootmode"
147
148 #define CONFIG_ROOTPATH                 "/nfs/root/path"
149 #define CONFIG_NFSBOOTCOMMAND                                           \
150         "setenv bootargs $bootargs root=/dev/nfs rw "                   \
151         "nfsroot=$serverip:$rootpath "                                  \
152         "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off;" \
153                 "run __nfsboot"
154
155 #ifdef CONFIG_FIT
156 #define CONFIG_BOOTFILE                 "fitImage"
157 #define LINUXBOOT_ENV_SETTINGS \
158         "fit_addr=0x00100000\0" \
159         "fit_addr_r=0x84100000\0" \
160         "fit_size=0x00f00000\0" \
161         "norboot=setexpr fit_addr $nor_base + $fit_addr &&" \
162                 "bootm $fit_addr\0" \
163         "nandboot=nand read $fit_addr_r $fit_addr $fit_size &&" \
164                 "bootm $fit_addr_r\0" \
165         "tftpboot=tftpboot $fit_addr_r $bootfile &&" \
166                 "bootm $fit_addr_r\0" \
167         "__nfsboot=run tftpboot\0"
168 #else
169 #ifdef CONFIG_ARM64
170 #define CONFIG_BOOTFILE                 "Image"
171 #define LINUXBOOT_CMD                   "booti"
172 #define KERNEL_ADDR_R                   "kernel_addr_r=0x80080000\0"
173 #define KERNEL_SIZE                     "kernel_size=0x00c00000\0"
174 #define RAMDISK_ADDR                    "ramdisk_addr=0x00e00000\0"
175 #else
176 #define CONFIG_BOOTFILE                 "zImage"
177 #define LINUXBOOT_CMD                   "bootz"
178 #define KERNEL_ADDR_R                   "kernel_addr_r=0x80208000\0"
179 #define KERNEL_SIZE                     "kernel_size=0x00800000\0"
180 #define RAMDISK_ADDR                    "ramdisk_addr=0x00a00000\0"
181 #endif
182 #define LINUXBOOT_ENV_SETTINGS \
183         "fdt_addr=0x00100000\0" \
184         "fdt_addr_r=0x84100000\0" \
185         "fdt_size=0x00008000\0" \
186         "kernel_addr=0x00200000\0" \
187         KERNEL_ADDR_R \
188         KERNEL_SIZE \
189         RAMDISK_ADDR \
190         "ramdisk_addr_r=0x84a00000\0" \
191         "ramdisk_size=0x00600000\0" \
192         "ramdisk_file=rootfs.cpio.uboot\0" \
193         "boot_common=setexpr bootm_low $kernel_addr_r '&' fe000000 &&" \
194                 LINUXBOOT_CMD " $kernel_addr_r $ramdisk_addr_r $fdt_addr_r\0" \
195         "norboot=setexpr kernel_addr $nor_base + $kernel_addr &&" \
196                 "setexpr kernel_size $kernel_size / 4 &&" \
197                 "cp $kernel_addr $kernel_addr_r $kernel_size &&" \
198                 "setexpr ramdisk_addr_r $nor_base + $ramdisk_addr &&" \
199                 "setexpr fdt_addr_r $nor_base + $fdt_addr &&" \
200                 "run boot_common\0" \
201         "nandboot=nand read $kernel_addr_r $kernel_addr $kernel_size &&" \
202                 "nand read $ramdisk_addr_r $ramdisk_addr $ramdisk_size &&" \
203                 "nand read $fdt_addr_r $fdt_addr $fdt_size &&" \
204                 "run boot_common\0" \
205         "tftpboot=tftpboot $kernel_addr_r $bootfile &&" \
206                 "tftpboot $ramdisk_addr_r $ramdisk_file &&" \
207                 "tftpboot $fdt_addr_r $fdt_file &&" \
208                 "run boot_common\0" \
209         "__nfsboot=tftpboot $kernel_addr_r $bootfile &&" \
210                 "tftpboot $fdt_addr_r $fdt_file &&" \
211                 "setenv ramdisk_addr_r - &&" \
212                 "run boot_common\0"
213 #endif
214
215 #define CONFIG_EXTRA_ENV_SETTINGS                               \
216         "netdev=eth0\0"                                         \
217         "verify=n\0"                                            \
218         "nor_base=0x42000000\0"                                 \
219         "sramupdate=setexpr tmp_addr $nor_base + 0x50000 &&"    \
220                 "tftpboot $tmp_addr u-boot-spl.bin &&"          \
221                 "setexpr tmp_addr $nor_base + 0x60000 &&"       \
222                 "tftpboot $tmp_addr u-boot.bin\0"               \
223         "emmcupdate=mmcsetn &&"                                 \
224                 "mmc partconf $mmc_first_dev 0 1 1 &&"          \
225                 "tftpboot u-boot-spl.bin &&"                    \
226                 "mmc write $loadaddr 0 80 &&"                   \
227                 "tftpboot u-boot.bin &&"                        \
228                 "mmc write $loadaddr 80 780\0"                  \
229         "nandupdate=nand erase 0 0x00100000 &&"                 \
230                 "tftpboot u-boot-spl.bin &&"                    \
231                 "nand write $loadaddr 0 0x00010000 &&"          \
232                 "tftpboot u-boot.bin &&"                        \
233                 "nand write $loadaddr 0x00010000 0x000f0000\0"  \
234         LINUXBOOT_ENV_SETTINGS
235
236 #define CONFIG_SYS_BOOTMAPSZ                    0x20000000
237
238 #define CONFIG_SYS_SDRAM_BASE           0x80000000
239 #define CONFIG_NR_DRAM_BANKS            3
240 /* for LD20; the last 64 byte is used for dynamic DDR PHY training */
241 #define CONFIG_SYS_MEM_TOP_HIDE         64
242
243 #if defined(CONFIG_ARM64)
244 #define CONFIG_SPL_TEXT_BASE            0x30000000
245 #elif defined(CONFIG_ARCH_UNIPHIER_SLD3) || \
246         defined(CONFIG_ARCH_UNIPHIER_LD4) || \
247         defined(CONFIG_ARCH_UNIPHIER_SLD8)
248 #define CONFIG_SPL_TEXT_BASE            0x00040000
249 #else
250 #define CONFIG_SPL_TEXT_BASE            0x00100000
251 #endif
252
253 #if defined(CONFIG_ARCH_UNIPHIER_LD11)
254 #define CONFIG_SPL_STACK                (0x30014c00)
255 #elif defined(CONFIG_ARCH_UNIPHIER_LD20)
256 #define CONFIG_SPL_STACK                (0x3001c000)
257 #else
258 #define CONFIG_SPL_STACK                (0x00100000)
259 #endif
260 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_TEXT_BASE)
261
262 #define CONFIG_PANIC_HANG
263
264 #define CONFIG_SPL_FRAMEWORK
265 #ifdef CONFIG_ARM64
266 #define CONFIG_SPL_BOARD_LOAD_IMAGE
267 #endif
268
269 #define CONFIG_SPL_BOARD_INIT
270
271 #define CONFIG_SYS_NAND_U_BOOT_OFFS             0x10000
272
273 /* subtract sizeof(struct image_header) */
274 #define CONFIG_SYS_UBOOT_BASE                   (0x60000 - 0x40)
275
276 #ifdef CONFIG_SPL
277 #define CONFIG_SPL_TARGET                       "u-boot-with-spl.bin"
278 #define CONFIG_SPL_MAX_FOOTPRINT                0x10000
279 #define CONFIG_SPL_MAX_SIZE                     0x10000
280 #if defined(CONFIG_ARCH_UNIPHIER_LD11)
281 #define CONFIG_SPL_BSS_START_ADDR               0x30012000
282 #elif defined(CONFIG_ARCH_UNIPHIER_LD20)
283 #define CONFIG_SPL_BSS_START_ADDR               0x30016000
284 #endif
285 #define CONFIG_SPL_BSS_MAX_SIZE                 0x2000
286 #endif
287
288 #endif /* __CONFIG_UNIPHIER_COMMON_H__ */