include/configs/uniphier.h

   1 /*
   2  * Copyright (C) 2012-2015 Panasonic Corporation
   3  * Copyright (C) 2015-2016 Socionext Inc.
   4  *   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
   5  *
   6  * SPDX-License-Identifier:     GPL-2.0+
   7  */
   8
   9 /* U-Boot - Common settings for UniPhier Family */
  10
  11 #ifndef __CONFIG_UNIPHIER_COMMON_H__
  12 #define __CONFIG_UNIPHIER_COMMON_H__
  13
  14 #define CONFIG_ARMV7_PSCI_1_0
  15
  16 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS  10
  17
  18 /*-----------------------------------------------------------------------
  19  * MMU and Cache Setting
  20  *----------------------------------------------------------------------*/
  21
  22 /* Comment out the following to enable L1 cache */
  23 /* #define CONFIG_SYS_ICACHE_OFF */
  24 /* #define CONFIG_SYS_DCACHE_OFF */
  25
  26 #define CONFIG_SYS_MALLOC_LEN           (4 * 1024 * 1024)
  27
  28 #define CONFIG_TIMESTAMP
  29
  30 /* FLASH related */
  31 #define CONFIG_MTD_DEVICE
  32
  33 #define CONFIG_SMC911X_32_BIT
  34 /* dummy: referenced by examples/standalone/smc911x_eeprom.c */
  35 #define CONFIG_SMC911X_BASE     0
  36
  37 #ifdef CONFIG_MICRO_SUPPORT_CARD
  38 #define CONFIG_SMC911X
  39 #endif
  40
  41 #define CONFIG_FLASH_CFI_DRIVER
  42 #define CONFIG_SYS_FLASH_CFI
  43
  44 #define CONFIG_SYS_MAX_FLASH_SECT       256
  45 #define CONFIG_SYS_MONITOR_BASE         0
  46 #define CONFIG_SYS_MONITOR_LEN          0x00080000      /* 512KB */
  47 #define CONFIG_SYS_FLASH_BASE           0
  48
  49 /*
  50  * flash_toggle does not work for our support card.
  51  * We need to use flash_status_poll.
  52  */
  53 #define CONFIG_SYS_CFI_FLASH_STATUS_POLL
  54
  55 #define CONFIG_FLASH_SHOW_PROGRESS      45 /* count down from 45/5: 9..1 */
  56
  57 #define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 1
  58
  59 /* serial console configuration */
  60
  61 #define CONFIG_SYS_LONGHELP             /* undef to save memory */
  62
  63 #define CONFIG_CMDLINE_EDITING          /* add command line history     */
  64 #define CONFIG_SYS_CBSIZE               1024    /* Console I/O Buffer Size */
  65 /* Print Buffer Size */
  66 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
  67 #define CONFIG_SYS_MAXARGS              16      /* max number of command */
  68 /* Boot Argument Buffer Size */
  69 #define CONFIG_SYS_BARGSIZE             (CONFIG_SYS_CBSIZE)
  70
  71 #define CONFIG_CONS_INDEX               1
  72
  73 #define CONFIG_ENV_OFFSET                       0x100000
  74 #define CONFIG_ENV_SIZE                         0x2000
  75 /* #define CONFIG_ENV_OFFSET_REDUND     (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) */
  76
  77 #define CONFIG_SYS_MMC_ENV_DEV          0
  78 #define CONFIG_SYS_MMC_ENV_PART         1
  79
  80 #ifdef CONFIG_ARMV8_MULTIENTRY
  81 #define CPU_RELEASE_ADDR                        0x80000000
  82 #define COUNTER_FREQUENCY                       50000000
  83 #define CONFIG_GICV3
  84 #define GICD_BASE                               0x5fe00000
  85 #if defined(CONFIG_ARCH_UNIPHIER_LD11)
  86 #define GICR_BASE                               0x5fe40000
  87 #elif defined(CONFIG_ARCH_UNIPHIER_LD20)
  88 #define GICR_BASE                               0x5fe80000
  89 #endif
  90 #elif !defined(CONFIG_ARM64)
  91 /* Time clock 1MHz */
  92 #define CONFIG_SYS_TIMER_RATE                   1000000
  93 #endif
  94
  95 #define CONFIG_SYS_MAX_NAND_DEVICE                      1
  96 #define CONFIG_SYS_NAND_MAX_CHIPS                       2
  97 #define CONFIG_SYS_NAND_ONFI_DETECTION
  98
  99 #define CONFIG_NAND_DENALI_ECC_SIZE                     1024
 100
 101 #ifdef CONFIG_ARCH_UNIPHIER_SLD3
 102 #define CONFIG_SYS_NAND_REGS_BASE                       0xf8100000
 103 #define CONFIG_SYS_NAND_DATA_BASE                       0xf8000000
 104 #else
 105 #define CONFIG_SYS_NAND_REGS_BASE                       0x68100000
 106 #define CONFIG_SYS_NAND_DATA_BASE                       0x68000000
 107 #endif
 108
 109 #define CONFIG_SYS_NAND_BASE            (CONFIG_SYS_NAND_DATA_BASE + 0x10)
 110
 111 #define CONFIG_SYS_NAND_USE_FLASH_BBT
 112 #define CONFIG_SYS_NAND_BAD_BLOCK_POS                   0
 113
 114 /* USB */
 115 #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS      4
 116
 117 /* SD/MMC */
 118 #define CONFIG_SUPPORT_EMMC_BOOT
 119
 120 /* memtest works on */
 121 #define CONFIG_SYS_MEMTEST_START        CONFIG_SYS_SDRAM_BASE
 122 #define CONFIG_SYS_MEMTEST_END          (CONFIG_SYS_SDRAM_BASE + 0x01000000)
 123
 124 /*
 125  * Network Configuration
 126  */
 127 #define CONFIG_SERVERIP                 192.168.11.1
 128 #define CONFIG_IPADDR                   192.168.11.10
 129 #define CONFIG_GATEWAYIP                192.168.11.1
 130 #define CONFIG_NETMASK                  255.255.255.0
 131
 132 #define CONFIG_LOADADDR                 0x84000000
 133 #define CONFIG_SYS_LOAD_ADDR            CONFIG_LOADADDR
 134
 135 #define CONFIG_CMDLINE_EDITING          /* add command line history     */
 136
 137 #if defined(CONFIG_ARM64) && !defined(CONFIG_ARMV8_MULTIENTRY)
 138 /* ARM Trusted Firmware */
 139 #define BOOT_IMAGES \
 140         "second_image=unph_bl.bin\0" \
 141         "third_image=fip.bin\0"
 142 #else
 143 #define BOOT_IMAGES \
 144         "second_image=u-boot-spl.bin\0" \
 145         "third_image=u-boot.bin\0"
 146 #endif
 147
 148 #define CONFIG_BOOTCOMMAND              "run $bootmode"
 149
 150 #define CONFIG_ROOTPATH                 "/nfs/root/path"
 151 #define CONFIG_NFSBOOTCOMMAND                                           \
 152         "setenv bootargs $bootargs root=/dev/nfs rw "                   \
 153         "nfsroot=$serverip:$rootpath "                                  \
 154         "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off;" \
 155                 "run __nfsboot"
 156
 157 #ifdef CONFIG_FIT
 158 #define CONFIG_BOOTFILE                 "fitImage"
 159 #define LINUXBOOT_ENV_SETTINGS \
 160         "fit_addr=0x00100000\0" \
 161         "fit_addr_r=0x84100000\0" \
 162         "fit_size=0x00f00000\0" \
 163         "norboot=setexpr fit_addr $nor_base + $fit_addr &&" \
 164                 "bootm $fit_addr\0" \
 165         "nandboot=nand read $fit_addr_r $fit_addr $fit_size &&" \
 166                 "bootm $fit_addr_r\0" \
 167         "tftpboot=tftpboot $fit_addr_r $bootfile &&" \
 168                 "bootm $fit_addr_r\0" \
 169         "__nfsboot=run tftpboot\0"
 170 #else
 171 #ifdef CONFIG_ARM64
 172 #define CONFIG_BOOTFILE                 "Image.gz"
 173 #define LINUXBOOT_CMD                   "booti"
 174 #define KERNEL_ADDR_LOAD                "kernel_addr_load=0x84200000\0"
 175 #define KERNEL_ADDR_R                   "kernel_addr_r=0x82080000\0"
 176 #else
 177 #define CONFIG_BOOTFILE                 "zImage"
 178 #define LINUXBOOT_CMD                   "bootz"
 179 #define KERNEL_ADDR_LOAD                "kernel_addr_load=0x80208000\0"
 180 #define KERNEL_ADDR_R                   "kernel_addr_r=0x80208000\0"
 181 #endif
 182 #define LINUXBOOT_ENV_SETTINGS \
 183         "fdt_addr=0x00100000\0" \
 184         "fdt_addr_r=0x84100000\0" \
 185         "fdt_size=0x00008000\0" \
 186         "kernel_addr=0x00200000\0" \
 187         KERNEL_ADDR_LOAD \
 188         KERNEL_ADDR_R \
 189         "kernel_size=0x00800000\0" \
 190         "ramdisk_addr=0x00a00000\0" \
 191         "ramdisk_addr_r=0x84a00000\0" \
 192         "ramdisk_size=0x00600000\0" \
 193         "ramdisk_file=rootfs.cpio.uboot\0" \
 194         "boot_common=setexpr bootm_low $kernel_addr_r '&' fe000000 && " \
 195                 "if test $kernel_addr_load = $kernel_addr_r; then " \
 196                         "true; " \
 197                 "else " \
 198                         "unzip $kernel_addr_load $kernel_addr_r; " \
 199                 "fi && " \
 200                 LINUXBOOT_CMD " $kernel_addr_r $ramdisk_addr_r $fdt_addr_r\0" \
 201         "norboot=setexpr kernel_addr_nor $nor_base + $kernel_addr && " \
 202                 "setexpr kernel_size_div4 $kernel_size / 4 && " \
 203                 "cp $kernel_addr_nor $kernel_addr_load $kernel_size_div4 && " \
 204                 "setexpr ramdisk_addr_nor $nor_base + $ramdisk_addr && " \
 205                 "setexpr ramdisk_size_div4 $ramdisk_size / 4 && " \
 206                 "cp $ramdisk_addr_nor $ramdisk_addr_r $ramdisk_size_div4 && " \
 207                 "setexpr fdt_addr_nor $nor_base + $fdt_addr && " \
 208                 "setexpr fdt_size_div4 $fdt_size / 4 && " \
 209                 "cp $fdt_addr_nor $fdt_addr_r $fdt_size_div4 && " \
 210                 "run boot_common\0" \
 211         "nandboot=nand read $kernel_addr_load $kernel_addr $kernel_size && " \
 212                 "nand read $ramdisk_addr_r $ramdisk_addr $ramdisk_size &&" \
 213                 "nand read $fdt_addr_r $fdt_addr $fdt_size &&" \
 214                 "run boot_common\0" \
 215         "tftpboot=tftpboot $kernel_addr_load $bootfile && " \
 216                 "tftpboot $ramdisk_addr_r $ramdisk_file &&" \
 217                 "tftpboot $fdt_addr_r $fdt_file &&" \
 218                 "run boot_common\0" \
 219         "__nfsboot=tftpboot $kernel_addr_load $bootfile && " \
 220                 "tftpboot $fdt_addr_r $fdt_file &&" \
 221                 "setenv ramdisk_addr_r - &&" \
 222                 "run boot_common\0"
 223 #endif
 224
 225 #define CONFIG_EXTRA_ENV_SETTINGS                               \
 226         "netdev=eth0\0"                                         \
 227         "verify=n\0"                                            \
 228         "initrd_high=0xffffffffffffffff\0"                      \
 229         "nor_base=0x42000000\0"                                 \
 230         "sramupdate=setexpr tmp_addr $nor_base + 0x50000 &&"    \
 231                 "tftpboot $tmp_addr $second_image && " \
 232                 "setexpr tmp_addr $nor_base + 0x70000 && " \
 233                 "tftpboot $tmp_addr $third_image\0" \
 234         "emmcupdate=mmcsetn &&"                                 \
 235                 "mmc partconf $mmc_first_dev 0 1 1 &&"          \
 236                 "tftpboot $second_image && " \
 237                 "mmc write $loadaddr 0 100 && " \
 238                 "tftpboot $third_image && " \
 239                 "mmc write $loadaddr 100 700\0" \
 240         "nandupdate=nand erase 0 0x00100000 &&"                 \
 241                 "tftpboot $second_image && " \
 242                 "nand write $loadaddr 0 0x00020000 && " \
 243                 "tftpboot $third_image && " \
 244                 "nand write $loadaddr 0x00020000 0x000e0000\0" \
 245         "usbupdate=usb start &&" \
 246                 "tftpboot $second_image && " \
 247                 "usb write $loadaddr 0 100 && " \
 248                 "tftpboot $third_image && " \
 249                 "usb write $loadaddr 100 700\0" \
 250         BOOT_IMAGES \
 251         LINUXBOOT_ENV_SETTINGS
 252
 253 #define CONFIG_SYS_BOOTMAPSZ                    0x20000000
 254
 255 #define CONFIG_SYS_SDRAM_BASE           0x80000000
 256 #define CONFIG_NR_DRAM_BANKS            3
 257 /* for LD20; the last 64 byte is used for dynamic DDR PHY training */
 258 #define CONFIG_SYS_MEM_TOP_HIDE         64
 259
 260 #define CONFIG_PANIC_HANG
 261
 262 #define CONFIG_SYS_INIT_SP_ADDR         (CONFIG_SYS_TEXT_BASE)
 263
 264 /* only for SPL */
 265 #if defined(CONFIG_ARM64)
 266 #define CONFIG_SPL_TEXT_BASE            0x30000000
 267 #elif defined(CONFIG_ARCH_UNIPHIER_SLD3) || \
 268         defined(CONFIG_ARCH_UNIPHIER_LD4) || \
 269         defined(CONFIG_ARCH_UNIPHIER_SLD8)
 270 #define CONFIG_SPL_TEXT_BASE            0x00040000
 271 #else
 272 #define CONFIG_SPL_TEXT_BASE            0x00100000
 273 #endif
 274
 275 #if defined(CONFIG_ARCH_UNIPHIER_LD11)
 276 #define CONFIG_SPL_STACK                (0x30014c00)
 277 #elif defined(CONFIG_ARCH_UNIPHIER_LD20)
 278 #define CONFIG_SPL_STACK                (0x3001c000)
 279 #else
 280 #define CONFIG_SPL_STACK                (0x00100000)
 281 #endif
 282
 283 #define CONFIG_SPL_FRAMEWORK
 284 #ifdef CONFIG_ARM64
 285 #define CONFIG_SPL_BOARD_LOAD_IMAGE
 286 #endif
 287
 288 #define CONFIG_SYS_NAND_U_BOOT_OFFS             0x20000
 289
 290 /* subtract sizeof(struct image_header) */
 291 #define CONFIG_SYS_UBOOT_BASE                   (0x70000 - 0x40)
 292
 293 #define CONFIG_SPL_TARGET                       "u-boot-with-spl.bin"
 294 #define CONFIG_SPL_MAX_FOOTPRINT                0x10000
 295 #if defined(CONFIG_ARCH_UNIPHIER_LD20)
 296 #define CONFIG_SPL_MAX_SIZE                     0x14000
 297 #else
 298 #define CONFIG_SPL_MAX_SIZE                     0x10000
 299 #endif
 300 #if defined(CONFIG_ARCH_UNIPHIER_LD11)
 301 #define CONFIG_SPL_BSS_START_ADDR               0x30012000
 302 #elif defined(CONFIG_ARCH_UNIPHIER_LD20)
 303 #define CONFIG_SPL_BSS_START_ADDR               0x30016000
 304 #endif
 305 #define CONFIG_SPL_BSS_MAX_SIZE                 0x2000
 306
 307 #define CONFIG_SPL_PAD_TO                       0x20000
 308
 309 #endif /* __CONFIG_UNIPHIER_COMMON_H__ */