2 * Copyright (C) 2012-2015 Panasonic Corporation
3 * Copyright (C) 2015-2016 Socionext Inc.
4 * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
6 * SPDX-License-Identifier: GPL-2.0+
9 /* U-Boot - Common settings for UniPhier Family */
11 #ifndef __CONFIG_UNIPHIER_COMMON_H__
12 #define __CONFIG_UNIPHIER_COMMON_H__
14 #define CONFIG_ARMV7_PSCI_1_0
16 #define CONFIG_SYS_EEPROM_PAGE_WRITE_DELAY_MS 10
18 /*-----------------------------------------------------------------------
19 * MMU and Cache Setting
20 *----------------------------------------------------------------------*/
22 /* Comment out the following to enable L1 cache */
23 /* #define CONFIG_SYS_ICACHE_OFF */
24 /* #define CONFIG_SYS_DCACHE_OFF */
26 #define CONFIG_BOARD_LATE_INIT
28 #define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
30 #define CONFIG_TIMESTAMP
33 #define CONFIG_MTD_DEVICE
35 #define CONFIG_SMC911X_32_BIT
36 /* dummy: referenced by examples/standalone/smc911x_eeprom.c */
37 #define CONFIG_SMC911X_BASE 0
39 #ifdef CONFIG_MICRO_SUPPORT_CARD
40 #define CONFIG_SMC911X
42 #define CONFIG_SYS_NO_FLASH
45 #define CONFIG_FLASH_CFI_DRIVER
46 #define CONFIG_SYS_FLASH_CFI
48 #define CONFIG_SYS_MAX_FLASH_SECT 256
49 #define CONFIG_SYS_MONITOR_BASE 0
50 #define CONFIG_SYS_MONITOR_LEN 0x00080000 /* 512KB */
51 #define CONFIG_SYS_FLASH_BASE 0
54 * flash_toggle does not work for our support card.
55 * We need to use flash_status_poll.
57 #define CONFIG_SYS_CFI_FLASH_STATUS_POLL
59 #define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */
61 #define CONFIG_SYS_MAX_FLASH_BANKS_DETECT 1
63 /* serial console configuration */
64 #define CONFIG_BAUDRATE 115200
66 #if !defined(CONFIG_SPL_BUILD) && !defined(CONFIG_ARM64)
67 #define CONFIG_USE_ARCH_MEMSET
68 #define CONFIG_USE_ARCH_MEMCPY
71 #define CONFIG_SYS_LONGHELP /* undef to save memory */
73 #define CONFIG_CMDLINE_EDITING /* add command line history */
74 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
75 /* Print Buffer Size */
76 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
77 #define CONFIG_SYS_MAXARGS 16 /* max number of command */
78 /* Boot Argument Buffer Size */
79 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
81 #define CONFIG_CONS_INDEX 1
83 /* #define CONFIG_ENV_IS_NOWHERE */
84 /* #define CONFIG_ENV_IS_IN_NAND */
85 #define CONFIG_ENV_IS_IN_MMC
86 #define CONFIG_ENV_OFFSET 0x80000
87 #define CONFIG_ENV_SIZE 0x2000
88 /* #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) */
90 #define CONFIG_SYS_MMC_ENV_DEV 0
91 #define CONFIG_SYS_MMC_ENV_PART 1
94 #define CPU_RELEASE_ADDR 0x80000000
95 #define COUNTER_FREQUENCY 50000000
97 #define GICD_BASE 0x5fe00000
98 #if defined(CONFIG_ARCH_UNIPHIER_LD11)
99 #define GICR_BASE 0x5fe40000
100 #elif defined(CONFIG_ARCH_UNIPHIER_LD20)
101 #define GICR_BASE 0x5fe80000
104 /* Time clock 1MHz */
105 #define CONFIG_SYS_TIMER_RATE 1000000
109 #define CONFIG_SYS_MAX_NAND_DEVICE 1
110 #define CONFIG_SYS_NAND_MAX_CHIPS 2
111 #define CONFIG_SYS_NAND_ONFI_DETECTION
113 #define CONFIG_NAND_DENALI_ECC_SIZE 1024
115 #ifdef CONFIG_ARCH_UNIPHIER_SLD3
116 #define CONFIG_SYS_NAND_REGS_BASE 0xf8100000
117 #define CONFIG_SYS_NAND_DATA_BASE 0xf8000000
119 #define CONFIG_SYS_NAND_REGS_BASE 0x68100000
120 #define CONFIG_SYS_NAND_DATA_BASE 0x68000000
123 #define CONFIG_SYS_NAND_BASE (CONFIG_SYS_NAND_DATA_BASE + 0x10)
125 #define CONFIG_SYS_NAND_USE_FLASH_BBT
126 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
129 #define CONFIG_SYS_USB_XHCI_MAX_ROOT_PORTS 4
130 #define CONFIG_FAT_WRITE
131 #define CONFIG_DOS_PARTITION
134 #define CONFIG_SUPPORT_EMMC_BOOT
135 #define CONFIG_GENERIC_MMC
137 /* memtest works on */
138 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
139 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x01000000)
142 * Network Configuration
144 #define CONFIG_SERVERIP 192.168.11.1
145 #define CONFIG_IPADDR 192.168.11.10
146 #define CONFIG_GATEWAYIP 192.168.11.1
147 #define CONFIG_NETMASK 255.255.255.0
149 #define CONFIG_LOADADDR 0x84000000
150 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
152 #define CONFIG_CMDLINE_EDITING /* add command line history */
154 #define CONFIG_BOOTCOMMAND "run $bootmode"
156 #define CONFIG_ROOTPATH "/nfs/root/path"
157 #define CONFIG_NFSBOOTCOMMAND \
158 "setenv bootargs $bootargs root=/dev/nfs rw " \
159 "nfsroot=$serverip:$rootpath " \
160 "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off;" \
164 #define CONFIG_BOOTFILE "fitImage"
165 #define LINUXBOOT_ENV_SETTINGS \
166 "fit_addr=0x00100000\0" \
167 "fit_addr_r=0x84100000\0" \
168 "fit_size=0x00f00000\0" \
169 "norboot=setexpr fit_addr $nor_base + $fit_addr &&" \
170 "bootm $fit_addr\0" \
171 "nandboot=nand read $fit_addr_r $fit_addr $fit_size &&" \
172 "bootm $fit_addr_r\0" \
173 "tftpboot=tftpboot $fit_addr_r $bootfile &&" \
174 "bootm $fit_addr_r\0" \
175 "__nfsboot=run tftpboot\0"
178 #define CONFIG_BOOTFILE "Image"
179 #define LINUXBOOT_CMD "booti"
180 #define KERNEL_ADDR_R "kernel_addr_r=0x80080000\0"
181 #define KERNEL_SIZE "kernel_size=0x00c00000\0"
182 #define RAMDISK_ADDR "ramdisk_addr=0x00e00000\0"
184 #define CONFIG_BOOTFILE "zImage"
185 #define LINUXBOOT_CMD "bootz"
186 #define KERNEL_ADDR_R "kernel_addr_r=0x80208000\0"
187 #define KERNEL_SIZE "kernel_size=0x00800000\0"
188 #define RAMDISK_ADDR "ramdisk_addr=0x00a00000\0"
190 #define LINUXBOOT_ENV_SETTINGS \
191 "fdt_addr=0x00100000\0" \
192 "fdt_addr_r=0x84100000\0" \
193 "fdt_size=0x00008000\0" \
194 "kernel_addr=0x00200000\0" \
198 "ramdisk_addr_r=0x84a00000\0" \
199 "ramdisk_size=0x00600000\0" \
200 "ramdisk_file=rootfs.cpio.uboot\0" \
201 "boot_common=setexpr bootm_low $kernel_addr_r '&' fe000000 &&" \
202 LINUXBOOT_CMD " $kernel_addr_r $ramdisk_addr_r $fdt_addr_r\0" \
203 "norboot=setexpr kernel_addr $nor_base + $kernel_addr &&" \
204 "setexpr kernel_size $kernel_size / 4 &&" \
205 "cp $kernel_addr $kernel_addr_r $kernel_size &&" \
206 "setexpr ramdisk_addr_r $nor_base + $ramdisk_addr &&" \
207 "setexpr fdt_addr_r $nor_base + $fdt_addr &&" \
208 "run boot_common\0" \
209 "nandboot=nand read $kernel_addr_r $kernel_addr $kernel_size &&" \
210 "nand read $ramdisk_addr_r $ramdisk_addr $ramdisk_size &&" \
211 "nand read $fdt_addr_r $fdt_addr $fdt_size &&" \
212 "run boot_common\0" \
213 "tftpboot=tftpboot $kernel_addr_r $bootfile &&" \
214 "tftpboot $ramdisk_addr_r $ramdisk_file &&" \
215 "tftpboot $fdt_addr_r $fdt_file &&" \
216 "run boot_common\0" \
217 "__nfsboot=tftpboot $kernel_addr_r $bootfile &&" \
218 "tftpboot $fdt_addr_r $fdt_file &&" \
219 "setenv ramdisk_addr_r - &&" \
223 #define CONFIG_EXTRA_ENV_SETTINGS \
226 "nor_base=0x42000000\0" \
227 "sramupdate=setexpr tmp_addr $nor_base + 0x50000 &&" \
228 "tftpboot $tmp_addr u-boot-spl.bin &&" \
229 "setexpr tmp_addr $nor_base + 0x60000 &&" \
230 "tftpboot $tmp_addr u-boot.bin\0" \
231 "emmcupdate=mmcsetn &&" \
232 "mmc partconf $mmc_first_dev 0 1 1 &&" \
233 "tftpboot u-boot-spl.bin &&" \
234 "mmc write $loadaddr 0 80 &&" \
235 "tftpboot u-boot.bin &&" \
236 "mmc write $loadaddr 80 780\0" \
237 "nandupdate=nand erase 0 0x00100000 &&" \
238 "tftpboot u-boot-spl.bin &&" \
239 "nand write $loadaddr 0 0x00010000 &&" \
240 "tftpboot u-boot.bin &&" \
241 "nand write $loadaddr 0x00010000 0x000f0000\0" \
242 LINUXBOOT_ENV_SETTINGS
244 #define CONFIG_SYS_BOOTMAPSZ 0x20000000
246 #define CONFIG_SYS_SDRAM_BASE 0x80000000
247 #define CONFIG_NR_DRAM_BANKS 2
248 /* for LD20; the last 64 byte is used for dynamic DDR PHY training */
249 #define CONFIG_SYS_MEM_TOP_HIDE 64
251 #if defined(CONFIG_ARM64)
252 #define CONFIG_SPL_TEXT_BASE 0x30000000
253 #elif defined(CONFIG_ARCH_UNIPHIER_SLD3) || \
254 defined(CONFIG_ARCH_UNIPHIER_LD4) || \
255 defined(CONFIG_ARCH_UNIPHIER_SLD8)
256 #define CONFIG_SPL_TEXT_BASE 0x00040000
258 #define CONFIG_SPL_TEXT_BASE 0x00100000
261 #if defined(CONFIG_ARCH_UNIPHIER_LD11)
262 #define CONFIG_SPL_STACK (0x30014c00)
263 #elif defined(CONFIG_ARCH_UNIPHIER_LD20)
264 #define CONFIG_SPL_STACK (0x3001c000)
266 #define CONFIG_SPL_STACK (0x00100000)
268 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_TEXT_BASE)
270 #define CONFIG_PANIC_HANG
272 #define CONFIG_SPL_FRAMEWORK
274 #define CONFIG_SPL_BOARD_LOAD_IMAGE
277 #define CONFIG_SPL_BOARD_INIT
279 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x10000
281 /* subtract sizeof(struct image_header) */
282 #define CONFIG_SYS_UBOOT_BASE (0x60000 - 0x40)
283 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x80
285 #define CONFIG_SPL_TARGET "u-boot-with-spl.bin"
286 #define CONFIG_SPL_MAX_FOOTPRINT 0x10000
287 #define CONFIG_SPL_MAX_SIZE 0x10000
288 #if defined(CONFIG_ARCH_UNIPHIER_LD11)
289 #define CONFIG_SPL_BSS_START_ADDR 0x30012000
290 #elif defined(CONFIG_ARCH_UNIPHIER_LD20)
291 #define CONFIG_SPL_BSS_START_ADDR 0x30016000
293 #define CONFIG_SPL_BSS_MAX_SIZE 0x2000
295 #endif /* __CONFIG_UNIPHIER_COMMON_H__ */