2 * Copyright (C) 2012-2014 Panasonic Corporation
3 * Author: Masahiro Yamada <yamada.m@jp.panasonic.com>
5 * SPDX-License-Identifier: GPL-2.0+
8 /* U-boot - Common settings for UniPhier Family */
10 #ifndef __CONFIG_UNIPHIER_COMMON_H__
11 #define __CONFIG_UNIPHIER_COMMON_H__
14 * Support card address map
16 #if defined(CONFIG_PFC_MICRO_SUPPORT_CARD)
17 # define CONFIG_SUPPORT_CARD_BASE 0x03f00000
18 # define CONFIG_SUPPORT_CARD_ETHER_BASE (CONFIG_SUPPORT_CARD_BASE + 0x00000000)
19 # define CONFIG_SUPPORT_CARD_LED_BASE (CONFIG_SUPPORT_CARD_BASE + 0x00090000)
20 # define CONFIG_SUPPORT_CARD_UART_BASE (CONFIG_SUPPORT_CARD_BASE + 0x000b0000)
23 #if defined(CONFIG_DCC_MICRO_SUPPORT_CARD)
24 # define CONFIG_SUPPORT_CARD_BASE 0x08000000
25 # define CONFIG_SUPPORT_CARD_ETHER_BASE (CONFIG_SUPPORT_CARD_BASE + 0x00000000)
26 # define CONFIG_SUPPORT_CARD_LED_BASE (CONFIG_SUPPORT_CARD_BASE + 0x00401630)
27 # define CONFIG_SUPPORT_CARD_UART_BASE (CONFIG_SUPPORT_CARD_BASE + 0x00200000)
30 #ifdef CONFIG_SYS_NS16550_SERIAL
31 #define CONFIG_SYS_NS16550
32 #define CONFIG_SYS_NS16550_COM1 CONFIG_SUPPORT_CARD_UART_BASE
33 #define CONFIG_SYS_NS16550_CLK 12288000
34 #define CONFIG_SYS_NS16550_REG_SIZE -2
37 #define CONFIG_SMC911X_BASE CONFIG_SUPPORT_CARD_ETHER_BASE
38 #define CONFIG_SMC911X_32_BIT
40 #define CONFIG_SYS_MALLOC_F_LEN 0x2000
42 /*-----------------------------------------------------------------------
43 * MMU and Cache Setting
44 *----------------------------------------------------------------------*/
46 /* Comment out the following to enable L1 cache */
47 /* #define CONFIG_SYS_ICACHE_OFF */
48 /* #define CONFIG_SYS_DCACHE_OFF */
50 /* Comment out the following to enable L2 cache */
51 #define CONFIG_UNIPHIER_L2CACHE_ON
53 #define CONFIG_DISPLAY_CPUINFO
54 #define CONFIG_DISPLAY_BOARDINFO
55 #define CONFIG_BOARD_LATE_INIT
57 #define CONFIG_SYS_MALLOC_LEN (4 * 1024 * 1024)
59 #define CONFIG_TIMESTAMP
62 #define CONFIG_MTD_DEVICE
65 * uncomment the following to disable FLASH related code.
67 /* #define CONFIG_SYS_NO_FLASH */
69 #define CONFIG_FLASH_CFI_DRIVER
70 #define CONFIG_SYS_FLASH_CFI
72 #define CONFIG_SYS_MAX_FLASH_SECT 256
73 #define CONFIG_SYS_MONITOR_BASE 0
74 #define CONFIG_SYS_FLASH_BASE 0
77 * flash_toggle does not work for out supoort card.
78 * We need to use flash_status_poll.
80 #define CONFIG_SYS_CFI_FLASH_STATUS_POLL
82 #define CONFIG_FLASH_SHOW_PROGRESS 45 /* count down from 45/5: 9..1 */
84 #if defined(CONFIG_PFC_MICRO_SUPPORT_CARD)
85 # define CONFIG_SYS_MAX_FLASH_BANKS 1
86 # define CONFIG_SYS_FLASH_BANKS_LIST {0x00000000}
87 # define CONFIG_SYS_FLASH_BANKS_SIZES {0x02000000}
90 #if defined(CONFIG_DCC_MICRO_SUPPORT_CARD)
91 # define CONFIG_SYS_MAX_FLASH_BANKS 1
92 # define CONFIG_SYS_FLASH_BANKS_LIST {0x04000000}
93 # define CONFIG_SYS_FLASH_BANKS_SIZES {0x04000000}
96 /* serial console configuration */
97 #define CONFIG_BAUDRATE 115200
99 #define CONFIG_SYS_GENERIC_BOARD
101 #if !defined(CONFIG_SPL_BUILD)
102 #define CONFIG_USE_ARCH_MEMSET
103 #define CONFIG_USE_ARCH_MEMCPY
106 #define CONFIG_SYS_LONGHELP /* undef to save memory */
108 #define CONFIG_CMDLINE_EDITING /* add command line history */
109 #define CONFIG_SYS_CBSIZE 1024 /* Console I/O Buffer Size */
110 /* Print Buffer Size */
111 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
112 #define CONFIG_SYS_MAXARGS 16 /* max number of command */
113 /* Boot Argument Buffer Size */
114 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
116 #define CONFIG_CONS_INDEX 1
119 * For NAND booting the environment is embedded in the U-Boot image. Please take
120 * look at the file board/amcc/canyonlands/u-boot-nand.lds for details.
122 /* #define CONFIG_ENV_IS_IN_NAND */
123 #define CONFIG_ENV_IS_NOWHERE
124 #define CONFIG_ENV_SIZE 0x2000
125 #define CONFIG_ENV_OFFSET 0x0
126 /* #define CONFIG_ENV_OFFSET_REDUND (CONFIG_ENV_OFFSET + CONFIG_ENV_SIZE) */
128 /* Time clock 1MHz */
129 #define CONFIG_SYS_TIMER_RATE 1000000
132 * By default, ARP timeout is 5 sec.
133 * The first ARP request does not seem to work.
134 * So we need to retry ARP request anyway.
135 * We want to shrink the interval until the second ARP request.
137 #define CONFIG_ARP_TIMEOUT 500UL /* 0.5 msec */
139 #define CONFIG_SYS_MAX_NAND_DEVICE 1
140 #define CONFIG_SYS_NAND_MAX_CHIPS 2
141 #define CONFIG_SYS_NAND_ONFI_DETECTION
143 #define CONFIG_NAND_DENALI_ECC_SIZE 1024
145 #define CONFIG_SYS_NAND_REGS_BASE 0x68100000
146 #define CONFIG_SYS_NAND_DATA_BASE 0x68000000
148 #define CONFIG_SYS_NAND_BASE (CONFIG_SYS_NAND_DATA_BASE + 0x10)
150 #define CONFIG_SYS_NAND_USE_FLASH_BBT
151 #define CONFIG_SYS_NAND_BAD_BLOCK_POS 0
154 #define CONFIG_USB_MAX_CONTROLLER_COUNT 2
155 #define CONFIG_CMD_FAT
156 #define CONFIG_FAT_WRITE
157 #define CONFIG_DOS_PARTITION
159 /* memtest works on */
160 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
161 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x01000000)
163 #define CONFIG_BOOTDELAY 3
164 #define CONFIG_ZERO_BOOTDELAY_CHECK /* check for keypress on bootdelay==0 */
165 #define CONFIG_AUTOBOOT_KEYED 1
166 #define CONFIG_AUTOBOOT_PROMPT \
167 "Press SPACE to abort autoboot in %d seconds\n", bootdelay
168 #define CONFIG_AUTOBOOT_DELAY_STR "d"
169 #define CONFIG_AUTOBOOT_STOP_STR " "
172 * Network Configuration
174 #define CONFIG_ETHADDR 00:21:83:24:00:00
175 #define CONFIG_SERVERIP 192.168.11.1
176 #define CONFIG_IPADDR 192.168.11.10
177 #define CONFIG_GATEWAYIP 192.168.11.1
178 #define CONFIG_NETMASK 255.255.255.0
180 #define CONFIG_LOADADDR 0x84000000
181 #define CONFIG_SYS_LOAD_ADDR CONFIG_LOADADDR
182 #define CONFIG_BOOTFILE "fit.itb"
184 #define CONFIG_CMDLINE_EDITING /* add command line history */
186 #define CONFIG_BOOTCOMMAND "run $bootmode"
188 #define CONFIG_ROOTPATH "/nfs/root/path"
189 #define CONFIG_NFSBOOTCOMMAND \
190 "setenv bootargs $bootargs root=/dev/nfs rw " \
191 "nfsroot=$serverip:$rootpath " \
192 "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname:$netdev:off;" \
195 #define CONFIG_BOOTARGS " user_debug=0x1f init=/sbin/init"
197 #define CONFIG_EXTRA_ENV_SETTINGS \
199 "image_offset=0x00080000\0" \
200 "image_size=0x00f00000\0" \
202 "norboot=run add_default_bootargs;" \
203 "bootm $image_offset\0" \
204 "nandboot=run add_default_bootargs;" \
205 "nand read $loadaddr $image_offset $image_size;" \
207 "add_default_bootargs=setenv bootargs $bootargs" \
208 " console=ttyS0,$baudrate\0" \
210 /* Open Firmware flat tree */
211 #define CONFIG_OF_LIBFDT
213 #define CONFIG_HAVE_ARM_SECURE
215 /* Memory Size & Mapping */
216 #define CONFIG_SYS_SDRAM_BASE CONFIG_SDRAM0_BASE
218 #if CONFIG_SDRAM0_BASE + CONFIG_SDRAM0_SIZE >= CONFIG_SDRAM1_BASE
219 /* Thre is no memory hole */
220 #define CONFIG_NR_DRAM_BANKS 1
221 #define CONFIG_SYS_SDRAM_SIZE (CONFIG_SDRAM0_SIZE + CONFIG_SDRAM1_SIZE)
223 #define CONFIG_NR_DRAM_BANKS 2
224 #define CONFIG_SYS_SDRAM_SIZE (CONFIG_SDRAM0_SIZE)
227 #define CONFIG_SYS_TEXT_BASE 0x84000000
229 #define CONFIG_BOARD_POSTCLK_INIT
231 #ifndef CONFIG_SPL_BUILD
232 #define CONFIG_SKIP_LOWLEVEL_INIT
235 #define CONFIG_SYS_SPL_MALLOC_START (0x0ff00000)
236 #define CONFIG_SYS_SPL_MALLOC_SIZE (0x00004000)
238 #define CONFIG_SYS_INIT_SP_ADDR (0x0ff08000)
240 #define CONFIG_SPL_FRAMEWORK
241 #define CONFIG_SPL_NAND_SUPPORT
243 #define CONFIG_SPL_LIBCOMMON_SUPPORT /* for mem_malloc_init */
244 #define CONFIG_SPL_LIBGENERIC_SUPPORT
246 #define CONFIG_SPL_BOARD_INIT
248 #define CONFIG_SYS_NAND_U_BOOT_OFFS 0x10000
250 #endif /* __CONFIG_UNIPHIER_COMMON_H__ */