1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright 2014-2015 Freescale Semiconductor, Inc.
4 * Copyright Jasbir Matharu
5 * Copyright 2015 UDOO Team
7 * Configuration settings for the UDOO NEO board.
13 #include "mx6_common.h"
17 /* Size of malloc() pool */
18 #define CONFIG_SYS_MALLOC_LEN (3 * SZ_1M)
20 /* MMC Configuration */
21 #define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR
23 /* Command definition */
24 #define CONFIG_MXC_UART_BASE UART1_BASE
25 #define CONFIG_SYS_MMC_ENV_DEV 0 /*USDHC2*/
28 #define CONFIG_EXTRA_ENV_SETTINGS \
29 "console=ttymxc0,115200\0" \
30 "fdt_high=0xffffffff\0" \
31 "initrd_high=0xffffffff\0" \
32 "fdtfile=undefined\0" \
33 "fdt_addr=0x83000000\0" \
34 "fdt_addr_r=0x83000000\0" \
37 "mmcrootfstype=ext4\0" \
39 "if test $board_name = BASIC; then " \
40 "setenv fdtfile imx6sx-udoo-neo-basic.dtb; fi; " \
41 "if test $board_name = BASICKS; then " \
42 "setenv fdtfile imx6sx-udoo-neo-basic.dtb; fi; " \
43 "if test $board_name = FULL; then " \
44 "setenv fdtfile imx6sx-udoo-neo-full.dtb; fi; " \
45 "if test $board_name = EXTENDED; then " \
46 "setenv fdtfile imx6sx-udoo-neo-extended.dtb; fi; " \
47 "if test $fdtfile = UNDEFINED; then " \
48 "echo WARNING: Could not determine dtb to use; fi\0" \
49 "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
50 "pxefile_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
51 "ramdisk_addr_r=0x84000000\0" \
52 "scriptaddr=" __stringify(CONFIG_LOADADDR) "\0" \
55 #define BOOT_TARGET_DEVICES(func) \
59 #include <config_distro_bootcmd.h>
61 /* Miscellaneous configurable options */
63 /* Physical Memory Map */
64 #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR
65 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM
66 #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR
67 #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE
69 #define CONFIG_SYS_INIT_SP_OFFSET \
70 (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
71 #define CONFIG_SYS_INIT_SP_ADDR \
72 (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
74 /* Environment organization */
76 #define CONFIG_IMX_THERMAL
79 #define CONFIG_SYS_I2C
80 #define CONFIG_SYS_I2C_MXC
81 #define CONFIG_SYS_I2C_MXC_I2C1
82 #define CONFIG_SYS_I2C_SPEED 100000
86 #define CONFIG_POWER_I2C
87 #define CONFIG_POWER_PFUZE3000
88 #define CONFIG_POWER_PFUZE3000_I2C_ADDR 0x08
89 #define PFUZE3000_I2C_BUS 0
92 #define CONFIG_FEC_MXC
94 #define CONFIG_FEC_ENET_DEV 0
95 #define IMX_FEC_BASE ENET_BASE_ADDR
96 #define CONFIG_FEC_MXC_PHYADDR 0x0
98 #define CONFIG_FEC_XCV_TYPE RMII
99 #define CONFIG_ETHPRIME "FEC0"
101 #endif /* __CONFIG_H */