2 * (C) Copyright 2003-2009
3 * Heiko Schocher, DENX Software Engineering, hs@denx.de.
5 * SPDX-License-Identifier: GPL-2.0+
12 * High Level Configuration Options
16 #define CONFIG_UC101 1 /* UC101 board */
17 #define CONFIG_HOSTNAME uc101
19 #ifndef CONFIG_SYS_TEXT_BASE
20 #define CONFIG_SYS_TEXT_BASE 0xFFF00000
22 #define CONFIG_SYS_LDSCRIPT "arch/powerpc/cpu/mpc5xxx/u-boot-customlayout.lds"
24 #include "manroland/common.h"
25 #include "manroland/mpc5200-common.h"
28 * Serial console configuration
30 #define CONFIG_BAUDRATE 115200 /* ... at 115200 bps */
35 #define CONFIG_BOOTP_BOOTFILESIZE
36 #define CONFIG_BOOTP_BOOTPATH
37 #define CONFIG_BOOTP_GATEWAY
38 #define CONFIG_BOOTP_HOSTNAME
43 #define CONFIG_SYS_MAX_FLASH_SECT 140
46 * Environment settings
48 #define CONFIG_ENV_SECT_SIZE 0x10000
53 #define CONFIG_SYS_IB_MASTER 0xc0510000 /* CS 6 */
54 #define CONFIG_SYS_IB_EPLD 0xc0500000 /* CS 7 */
57 #define CONFIG_SYS_SRAM_SIZE 0x200000
62 #define CONFIG_SYS_GPS_PORT_CONFIG 0x4d558044
64 #define CONFIG_SYS_MEMTEST_START 0x00300000
65 #define CONFIG_SYS_MEMTEST_END 0x00f00000
67 #define CONFIG_SYS_LOAD_ADDR 0x300000
69 #define CONFIG_SYS_BOOTCS_CFG 0x00045D00
71 /* 8Mbit SRAM @0x80100000 */
72 #define CONFIG_SYS_CS1_SIZE 0x00200000
73 #define CONFIG_SYS_CS1_CFG 0x21D00
75 /* Display H1, Status Inputs, EPLD @0x80600000 8 Bit */
76 #define CONFIG_SYS_CS3_START CONFIG_SYS_DISPLAY_BASE
77 #define CONFIG_SYS_CS3_SIZE 0x00000100
78 #define CONFIG_SYS_CS3_CFG 0x00081802
80 /* Interbus Master 16 Bit */
81 #define CONFIG_SYS_CS6_START CONFIG_SYS_IB_MASTER
82 #define CONFIG_SYS_CS6_SIZE 0x00010000
83 #define CONFIG_SYS_CS6_CFG 0x00FF3500
85 /* Interbus EPLD 8 Bit */
86 #define CONFIG_SYS_CS7_START CONFIG_SYS_IB_EPLD
87 #define CONFIG_SYS_CS7_SIZE 0x00010000
88 #define CONFIG_SYS_CS7_CFG 0x00081800
90 /*-----------------------------------------------------------------------
91 * IDE/ATA stuff Supports IDE harddisk
92 *-----------------------------------------------------------------------
95 #define CONFIG_SYS_IDE_MAXDEVICE 1 /* max. 2 drives per IDE bus*/
97 /*---------------------------------------------------------------------*/
98 /* Display addresses */
99 /*---------------------------------------------------------------------*/
100 #define CONFIG_SYS_DISP_CHR_RAM (CONFIG_SYS_DISPLAY_BASE + 0x38)
101 #define CONFIG_SYS_DISP_CWORD (CONFIG_SYS_DISPLAY_BASE + 0x30)
103 #endif /* __CONFIG_H */