include/configs/u8500_href.h

   1 /*
   2  * Copyright (C) ST-Ericsson SA 2009
   3  *
   4  * See file CREDITS for list of people who contributed to this
   5  * project.
   6  *
   7  * This program is free software; you can redistribute it and/or
   8  * modify it under the terms of the GNU General Public License as
   9  * published by the Free Software Foundation; either version 2 of
  10  * the License, or (at your option) any later version.
  11  *
  12  * This program is distributed in the hope that it will be useful,
  13  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  * GNU General Public License for more details.
  16  *
  17  * You should have received a copy of the GNU General Public License
  18  * along with this program; if not, write to the Free Software
  19  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  20  * MA 02111-1307 USA
  21  */
  22
  23 #ifndef __CONFIG_H
  24 #define __CONFIG_H
  25
  26 /*
  27  * High Level Configuration Options
  28  * (easy to change)
  29  */
  30 #define CONFIG_U8500
  31 #define CONFIG_L2_OFF
  32
  33 #define CONFIG_SYS_MEMTEST_START        0x00000000
  34 #define CONFIG_SYS_MEMTEST_END  0x1FFFFFFF
  35 #define CONFIG_SYS_HZ           1000            /* must be 1000 */
  36
  37 #define CONFIG_BOARD_EARLY_INIT_F
  38 #define CONFIG_BOARD_LATE_INIT
  39
  40 /*
  41  * Size of malloc() pool
  42  */
  43 #ifdef CONFIG_BOOT_SRAM
  44 #define CONFIG_ENV_SIZE         (32*1024)
  45 #define CONFIG_SYS_MALLOC_LEN   (CONFIG_ENV_SIZE + 64*1024)
  46 #else
  47 #define CONFIG_ENV_SIZE         (128*1024)
  48 #define CONFIG_SYS_MALLOC_LEN   (CONFIG_ENV_SIZE + 256*1024)
  49 #endif
  50 #define CONFIG_SYS_GBL_DATA_SIZE        128     /* for initial data */
  51
  52 /*
  53  * PL011 Configuration
  54  */
  55 #define CONFIG_PL011_SERIAL
  56 #define CONFIG_PL011_SERIAL_RLCR
  57 #define CONFIG_PL011_SERIAL_FLUSH_ON_INIT
  58
  59 /*
  60  * U8500 UART registers base for 3 serial devices
  61  */
  62 #define CFG_UART0_BASE          0x80120000
  63 #define CFG_UART1_BASE          0x80121000
  64 #define CFG_UART2_BASE          0x80007000
  65 #define CFG_SERIAL0             CFG_UART0_BASE
  66 #define CFG_SERIAL1             CFG_UART1_BASE
  67 #define CFG_SERIAL2             CFG_UART2_BASE
  68 #define CONFIG_PL011_CLOCK      38400000
  69 #define CONFIG_PL01x_PORTS      { (void *)CFG_SERIAL0, (void *)CFG_SERIAL1, \
  70                                   (void *)CFG_SERIAL2 }
  71 #define CONFIG_CONS_INDEX       2
  72 #define CONFIG_BAUDRATE         115200
  73 #define CONFIG_SYS_BAUDRATE_TABLE       { 9600, 19200, 38400, 57600, 115200 }
  74
  75 /*
  76  * Devices and file systems
  77  */
  78 #define CONFIG_MMC
  79 #define CONFIG_GENERIC_MMC
  80 #define CONFIG_DOS_PARTITION
  81
  82 /*
  83  * Commands
  84  */
  85 #define CONFIG_CMD_MEMORY
  86 #define CONFIG_CMD_BOOTD
  87 #define CONFIG_CMD_BDI
  88 #define CONFIG_CMD_IMI
  89 #define CONFIG_CMD_MISC
  90 #define CONFIG_CMD_RUN
  91 #define CONFIG_CMD_ECHO
  92 #define CONFIG_CMD_CONSOLE
  93 #define CONFIG_CMD_LOADS
  94 #define CONFIG_CMD_LOADB
  95 #define CONFIG_CMD_MMC
  96 #define CONFIG_CMD_FAT
  97 #define CONFIG_CMD_EXT2
  98 #define CONFIG_CMD_SOURCE
  99 #define CONFIG_CMD_I2C
 100
 101 #ifndef CONFIG_BOOTDELAY
 102 #define CONFIG_BOOTDELAY        1
 103 #endif
 104 #define CONFIG_ZERO_BOOTDELAY_CHECK     /* check for keypress on bootdelay==0 */
 105
 106 #undef CONFIG_BOOTARGS
 107 #define CONFIG_BOOTCOMMAND      "run emmcboot"
 108
 109 #define CONFIG_EXTRA_ENV_SETTINGS \
 110         "verify=n\0"                                                    \
 111         "loadaddr=0x00100000\0"                                         \
 112         "console=ttyAMA2,115200n8\0"                                    \
 113         "memargs256=mem=96M@0 mem_modem=32M@96M mem=30M@128M "          \
 114                 "pmem=22M@158M pmem_hwb=44M@180M mem_mali=32@224M\0"    \
 115         "memargs512=mem=96M@0 mem_modem=32M@96M mem=44M@128M "          \
 116                 "pmem=22M@172M mem=30M@194M mem_mali=32M@224M "         \
 117                 "pmem_hwb=54M@256M mem=202M@310M\0"                     \
 118         "commonargs=setenv bootargs cachepolicy=writealloc noinitrd "   \
 119                 "init=init "                                            \
 120                 "board_id=${board_id} "                                 \
 121                 "logo.${logo} "                                         \
 122                 "startup_graphics=${startup_graphics}\0"                \
 123         "emmcargs=setenv bootargs ${bootargs} "                         \
 124                 "root=/dev/mmcblk0p2 "                                  \
 125                 "rootdelay=1\0"                                         \
 126         "addcons=setenv bootargs ${bootargs} "                          \
 127                 "console=${console}\0"                                  \
 128         "emmcboot=echo Booting from eMMC ...; "                         \
 129                 "run commonargs emmcargs addcons memargs;"              \
 130                 "mmc read 0 ${loadaddr} 0xA0000 0x4000;"                \
 131                 "bootm ${loadaddr}\0"                                   \
 132         "flash=mmc init 1;fatload mmc 1 ${loadaddr} flash.scr;"         \
 133                 "source ${loadaddr}\0"                                  \
 134         "loaduimage=mmc init 1;fatload mmc 1 ${loadaddr} uImage\0"      \
 135         "usbtty=cdc_acm\0"                                              \
 136         "stdout=serial,usbtty\0"                                        \
 137         "stdin=serial,usbtty\0"                                         \
 138         "stderr=serial,usbtty\0"
 139
 140 /*
 141  * Miscellaneous configurable options
 142  */
 143
 144 #define CONFIG_SYS_LONGHELP                     /* undef to save memory     */
 145 #define CONFIG_SYS_PROMPT       "U8500 $ "      /* Monitor Command Prompt   */
 146 #define CONFIG_SYS_CBSIZE       1024            /* Console I/O Buffer Size  */
 147
 148 /* Print Buffer Size */
 149 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE \
 150                                         + sizeof(CONFIG_SYS_PROMPT) + 16)
 151 #define CONFIG_SYS_MAXARGS      32      /* max number of command args */
 152 #define CONFIG_SYS_BARGSIZE     CONFIG_SYS_CBSIZE /* Boot Arg Buffer Size */
 153
 154 #undef  CONFIG_SYS_CLKS_IN_HZ           /* everything, incl board info, in Hz */
 155 #define CONFIG_SYS_LOAD_ADDR            0x00100000 /* default load address */
 156 #define CONFIG_SYS_LOADS_BAUD_CHANGE
 157
 158 #define CONFIG_SYS_HUSH_PARSER
 159 #define CONFIG_SYS_PROMPT_HUSH_PS2      "> "
 160 #define CONFIG_CMDLINE_EDITING
 161
 162 #define CONFIG_SETUP_MEMORY_TAGS        2
 163 #define CONFIG_INITRD_TAG
 164 #define CONFIG_CMDLINE_TAG                      /* enable passing of ATAGs  */
 165
 166 /*
 167  * I2C
 168  */
 169 #define CONFIG_U8500_I2C
 170 #undef  CONFIG_HARD_I2C                 /* I2C with hardware support */
 171 #undef  CONFIG_SOFT_I2C                 /* I2C bit-banged */
 172 #define CONFIG_I2C_MULTI_BUS
 173 #define CONFIG_SYS_I2C_SPEED            100000
 174 #define CONFIG_SYS_I2C_SLAVE            0       /* slave addr of controller */
 175 #define CONFIG_SYS_U8500_I2C0_BASE              0x80004000
 176 #define CONFIG_SYS_U8500_I2C1_BASE              0x80122000
 177 #define CONFIG_SYS_U8500_I2C2_BASE              0x80128000
 178 #define CONFIG_SYS_U8500_I2C3_BASE              0x80110000
 179 #define CONFIG_SYS_U8500_I2C_BUS_MAX            4
 180
 181 #define CONFIG_SYS_I2C_GPIOE_ADDR       0x42    /* GPIO expander chip addr */
 182 #define CONFIG_TC35892_GPIO
 183 /*
 184  * Stack sizes
 185  *
 186  * The stack sizes are set up in start.S using the settings below
 187  */
 188
 189 #ifdef CONFIG_USE_IRQ
 190 #define CONFIG_STACKSIZE_IRQ            (4*1024)        /* IRQ stack */
 191 #define CONFIG_STACKSIZE_FIQ            (4*1024)        /* FIQ stack */
 192 #endif
 193
 194 /*
 195  * Physical Memory Map
 196  */
 197 #define CONFIG_NR_DRAM_BANKS            1
 198 #define PHYS_SDRAM_1                    0x00000000      /* DDR-SDRAM Bank #1 */
 199 #define PHYS_SDRAM_SIZE_1               0x20000000      /* 512 MB */
 200
 201 /*
 202  * additions for new relocation code
 203  */
 204 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
 205 #define CONFIG_SYS_INIT_RAM_SIZE        0x100000
 206 #define CONFIG_SYS_GBL_DATA_OFFSET      (CONFIG_SYS_SDRAM_BASE + \
 207                                          CONFIG_SYS_INIT_RAM_SIZE - \
 208                                          GENERATED_GBL_DATA_SIZE)
 209 #define CONFIG_SYS_INIT_SP_ADDR         CONFIG_SYS_GBL_DATA_OFFSET
 210
 211 /* landing address before relocation */
 212 #ifndef CONFIG_SYS_TEXT_BASE
 213 #define CONFIG_SYS_TEXT_BASE            0x0
 214 #endif
 215
 216 /*
 217  * MMC related configs
 218  * NB Only externa SD slot is currently supported
 219  */
 220 #define MMC_BLOCK_SIZE                  512
 221 #define CONFIG_ARM_PL180_MMCI
 222 #define CONFIG_ARM_PL180_MMCI_BASE      0x80126000      /* MMC base for 8500  */
 223 #define CONFIG_ARM_PL180_MMCI_CLOCK_FREQ 6250000
 224 #define CONFIG_MMC_DEV_NUM              1
 225
 226 #define CONFIG_CMD_ENV
 227 #define CONFIG_CMD_SAVEENV      /* CMD_ENV is obsolete but used in env_emmc.c */
 228 #define CONFIG_ENV_IS_IN_MMC
 229 #define CONFIG_ENV_OFFSET               0x13F80000
 230 #define CONFIG_SYS_MMC_ENV_DEV          0               /* SLOT2: eMMC */
 231
 232 /*
 233  * FLASH and environment organization
 234  */
 235 #define CONFIG_SYS_NO_FLASH
 236
 237 /*
 238  * base register values for U8500
 239  */
 240 #define CFG_PRCMU_BASE          0x80157000      /* Power, reset and clock
 241                                                    management unit */
 242 #define CFG_FSMC_BASE           0x80000000      /* FSMC Controller */
 243
 244 #endif  /* __CONFIG_H */