include/configs/tuxx1.h

   1 /*
   2  * Copyright (C) 2006 Freescale Semiconductor, Inc.
   3  *                    Dave Liu <daveliu@freescale.com>
   4  *
   5  * Copyright (C) 2007 Logic Product Development, Inc.
   6  *                    Peter Barada <peterb@logicpd.com>
   7  *
   8  * Copyright (C) 2007 MontaVista Software, Inc.
   9  *                    Anton Vorontsov <avorontsov@ru.mvista.com>
  10  *
  11  * (C) Copyright 2008
  12  * Heiko Schocher, DENX Software Engineering, hs@denx.de.
  13  *
  14  * (C) Copyright 2010-2013
  15  * Lukas Roggli, KEYMILE Ltd, lukas.roggli@keymile.com
  16  * Holger Brunck,  Keymile GmbH, holger.bruncl@keymile.com
  17  *
  18  * SPDX-License-Identifier:     GPL-2.0+
  19  */
  20
  21 #ifndef __CONFIG_H
  22 #define __CONFIG_H
  23
  24 /*
  25  * High Level Configuration Options
  26  */
  27 #if defined(CONFIG_KMSUPX5)
  28 #define CONFIG_KM_BOARD_NAME    "kmsupx5"
  29 #define CONFIG_HOSTNAME         "kmsupx5"
  30 #elif defined(CONFIG_TUGE1)
  31 #define CONFIG_KM_BOARD_NAME    "tuge1"
  32 #define CONFIG_HOSTNAME         "tuge1"
  33 #elif defined(CONFIG_TUXX1)     /* TUXX1 board (tuxa1/tuda1) specific */
  34 #define CONFIG_KM_BOARD_NAME    "tuxx1"
  35 #define CONFIG_HOSTNAME         "tuxx1"
  36 #elif defined(CONFIG_KMOPTI2)
  37 #define CONFIG_KM_BOARD_NAME    "kmopti2"
  38 #define CONFIG_HOSTNAME         "kmopti2"
  39 #elif defined(CONFIG_KMTEPR2)
  40 #define CONFIG_KM_BOARD_NAME    "kmtepr2"
  41 #define CONFIG_HOSTNAME         "kmtepr2"
  42 #else
  43 #error ("Board not supported")
  44 #endif
  45
  46 /* include common defines/options for all 8321 Keymile boards */
  47 #include "km/km8321-common.h"
  48
  49 #define CONFIG_SYS_APP1_BASE    0xA0000000    /* PAXG */
  50 #define CONFIG_SYS_APP1_SIZE    256 /* Megabytes */
  51 #if defined(CONFIG_TUXX1) || defined(CONFIG_KMOPTI2) || defined(CONFIG_KMTEPR2)
  52 #define CONFIG_SYS_APP2_BASE    0xB0000000    /* PINC3 */
  53 #define CONFIG_SYS_APP2_SIZE    256 /* Megabytes */
  54 #endif
  55
  56 /*
  57  * Init Local Bus Memory Controller:
  58  *                                    Device on board
  59  * Bank Bus     Machine PortSz Size   TUDA1  TUXA1  TUGE1   KMSUPX4 KMOPTI2
  60  * -----------------------------------------------------------------------------
  61  *  2   Local   GPCM    8 bit  256MB  PAXG   LPXF   PAXI    LPXF    PAXE
  62  *  3   Local   GPCM    8 bit  256MB  PINC3  PINC2  unused  unused  OPI2(16 bit)
  63  *
  64  *                                    Device on board (continued)
  65  * Bank Bus     Machine PortSz Size   KMTEPR2
  66  * -----------------------------------------------------------------------------
  67  *  2   Local   GPCM    8 bit  256MB  NVRAM
  68  *  3   Local   GPCM    8 bit  256MB  TEP2 (16 bit)
  69  */
  70
  71 #if defined(CONFIG_KMTEPRO2)
  72 /*
  73  * Configuration for C2 (NVRAM) on the local bus
  74  */
  75 #define CONFIG_SYS_LBLAWBAR2_PRELIM    CONFIG_SYS_APP1_BASE
  76 #define CONFIG_SYS_LBLAWAR2_PRELIM     (LBLAWAR_EN | LBLAWAR_256MB)
  77 #define CONFIG_SYS_BR2_PRELIM  (CONFIG_SYS_APP1_BASE | \
  78                                 BR_PS_8 | \
  79                                 BR_MS_GPCM | \
  80                                 BR_V)
  81 #define CONFIG_SYS_OR2_PRELIM  (MEG_TO_AM(CONFIG_SYS_APP1_SIZE) | \
  82                                 OR_GPCM_CSNT | \
  83                                 OR_GPCM_ACS_DIV2 | \
  84                                 OR_GPCM_XACS | \
  85                                 OR_GPCM_SCY_2 | \
  86                                 OR_GPCM_TRLX_SET | \
  87                                 OR_GPCM_EHTR_SET | \
  88                                 OR_GPCM_EAD)
  89 #else
  90 /*
  91  * Configuration for C2 on the local bus
  92  */
  93 /* Window base at flash base */
  94 #define CONFIG_SYS_LBLAWBAR2_PRELIM     CONFIG_SYS_APP1_BASE
  95 /* Window size: 256 MB */
  96 #define CONFIG_SYS_LBLAWAR2_PRELIM      (LBLAWAR_EN | LBLAWAR_256MB)
  97
  98 #define CONFIG_SYS_BR2_PRELIM   (CONFIG_SYS_APP1_BASE | \
  99                                  BR_PS_8 | \
 100                                  BR_MS_GPCM | \
 101                                  BR_V)
 102
 103 #define CONFIG_SYS_OR2_PRELIM   (MEG_TO_AM(CONFIG_SYS_APP1_SIZE) | \
 104                                  OR_GPCM_CSNT | \
 105                                  OR_GPCM_ACS_DIV4 | \
 106                                  OR_GPCM_SCY_2 | \
 107                                  OR_GPCM_TRLX_SET | \
 108                                  OR_GPCM_EHTR_CLEAR | \
 109                                  OR_GPCM_EAD)
 110 #endif
 111
 112 #if defined(CONFIG_TUXX1)
 113 /*
 114  * Configuration for C3 on the local bus
 115  */
 116 /* Access window base at PINC3 base */
 117 #define CONFIG_SYS_LBLAWBAR3_PRELIM     CONFIG_SYS_APP2_BASE
 118 /* Window size: 256 MB */
 119 #define CONFIG_SYS_LBLAWAR3_PRELIM      (LBLAWAR_EN | LBLAWAR_256MB)
 120
 121 #define CONFIG_SYS_BR3_PRELIM   (CONFIG_SYS_APP2_BASE | \
 122                                  BR_PS_8 |              \
 123                                  BR_MS_GPCM |           \
 124                                  BR_V)
 125
 126 #define CONFIG_SYS_OR3_PRELIM   (MEG_TO_AM(CONFIG_SYS_APP2_SIZE) | \
 127                                  OR_GPCM_CSNT | \
 128                                  OR_GPCM_ACS_DIV2 | \
 129                                  OR_GPCM_SCY_2 | \
 130                                  OR_GPCM_TRLX_SET | \
 131                                  OR_GPCM_EHTR_CLEAR)
 132
 133 #define CONFIG_SYS_MAMR         (MxMR_GPL_x4DIS | \
 134                                  0x0000c000 | \
 135                                  MxMR_WLFx_2X)
 136 #endif
 137
 138 #if defined(CONFIG_KMOPTI2) || defined(CONFIG_KMTEPR2)
 139 /*
 140  * Configuration for C3 on the local bus
 141  */
 142 #define CONFIG_SYS_LBLAWBAR3_PRELIM     CONFIG_SYS_APP2_BASE
 143 #define CONFIG_SYS_LBLAWAR3_PRELIM      (LBLAWAR_EN | LBLAWAR_256MB)
 144 #define CONFIG_SYS_BR3_PRELIM   (CONFIG_SYS_APP2_BASE | \
 145                                  BR_PS_16 |             \
 146                                  BR_MS_GPCM |           \
 147                                  BR_V)
 148 #define CONFIG_SYS_OR3_PRELIM   (MEG_TO_AM(CONFIG_SYS_APP2_SIZE) | \
 149                                  OR_GPCM_SCY_4 | \
 150                                  OR_GPCM_TRLX_CLEAR | \
 151                                  OR_GPCM_EHTR_CLEAR)
 152 #endif
 153
 154 /*
 155  * MMU Setup
 156  */
 157 /* APP1: icache cacheable, but dcache-inhibit and guarded */
 158 #define CONFIG_SYS_IBAT5L       (CONFIG_SYS_APP1_BASE | \
 159                                  BATL_PP_RW | \
 160                                  BATL_MEMCOHERENCE)
 161 /* 512M should also include APP2... */
 162 #define CONFIG_SYS_IBAT5U       (CONFIG_SYS_APP1_BASE | \
 163                                  BATU_BL_256M | \
 164                                  BATU_VS | \
 165                                  BATU_VP)
 166 #define CONFIG_SYS_DBAT5L       (CONFIG_SYS_APP1_BASE | \
 167                                  BATL_PP_RW | \
 168                                  BATL_CACHEINHIBIT | \
 169                                  BATL_GUARDEDSTORAGE)
 170 #define CONFIG_SYS_DBAT5U       CONFIG_SYS_IBAT5U
 171
 172 #if defined(CONFIG_TUGE1) || defined(CONFIG_KMSUPX5)
 173 #define CONFIG_SYS_IBAT6L       (0)
 174 #define CONFIG_SYS_IBAT6U       (0)
 175 #define CONFIG_SYS_DBAT6L       CONFIG_SYS_IBAT6L
 176 #else
 177 /* APP2:  icache cacheable, but dcache-inhibit and guarded */
 178 #define CONFIG_SYS_IBAT6L       (CONFIG_SYS_APP2_BASE | \
 179                                  BATL_PP_RW | \
 180                                  BATL_MEMCOHERENCE)
 181 #define CONFIG_SYS_IBAT6U       (CONFIG_SYS_APP2_BASE | \
 182                                  BATU_BL_256M | \
 183                                  BATU_VS | \
 184                                  BATU_VP)
 185 #define CONFIG_SYS_DBAT6L       (CONFIG_SYS_APP2_BASE | \
 186                                  BATL_PP_RW | \
 187                                  BATL_CACHEINHIBIT | \
 188                                  BATL_GUARDEDSTORAGE)
 189 #endif
 190 #define CONFIG_SYS_DBAT6U       CONFIG_SYS_IBAT6U
 191
 192 #define CONFIG_SYS_IBAT7L       (0)
 193 #define CONFIG_SYS_IBAT7U       (0)
 194 #define CONFIG_SYS_DBAT7L       CONFIG_SYS_IBAT7L
 195 #define CONFIG_SYS_DBAT7U       CONFIG_SYS_IBAT7U
 196
 197 #endif /* __CONFIG_H */