Merge https://gitlab.denx.de/u-boot/custodians/u-boot-marvell
[platform/kernel/u-boot.git] / include / configs / ts4800.h
1 /* SPDX-License-Identifier: GPL-2.0+ */
2 /*
3  * Copyright (C) 2015, Savoir-faire Linux Inc.
4  *
5  * Derived from MX51EVK code by
6  *   Guennadi Liakhovetski <lg@denx.de>
7  *   Freescale Semiconductor, Inc.
8  *
9  * Configuration settings for the TS4800 Board
10  */
11
12 #ifndef __CONFIG_H
13 #define __CONFIG_H
14
15 /* High Level Configuration Options */
16
17 #define CONFIG_SKIP_LOWLEVEL_INIT       /* U-Boot is a 2nd stage bootloader */
18
19 #define CONFIG_HW_WATCHDOG
20
21 #define CONFIG_MACH_TYPE        MACH_TYPE_TS48XX
22
23 /* text base address used when linking */
24
25 #include <asm/arch/imx-regs.h>
26
27 /* enable passing of ATAGs */
28 #define CONFIG_CMDLINE_TAG
29 #define CONFIG_SETUP_MEMORY_TAGS
30 #define CONFIG_INITRD_TAG
31 #define CONFIG_REVISION_TAG
32
33 /*
34  * Size of malloc() pool
35  */
36 #define CONFIG_SYS_MALLOC_LEN           (10 * 1024 * 1024)
37
38 /*
39  * Hardware drivers
40  */
41
42 #define CONFIG_MXC_UART
43 #define CONFIG_MXC_UART_BASE    UART1_BASE
44
45 /*
46  * MMC Configs
47  * */
48 #define CONFIG_SYS_FSL_ESDHC_ADDR       MMC_SDHC1_BASE_ADDR
49
50 /*
51  * Eth Configs
52  */
53 #define CONFIG_PHY_SMSC
54
55 #define CONFIG_FEC_MXC
56 #define IMX_FEC_BASE            FEC_BASE_ADDR
57 #define CONFIG_ETHPRIME         "FEC"
58 #define CONFIG_FEC_MXC_PHYADDR  0
59
60 /* allow to overwrite serial and ethaddr */
61 #define CONFIG_ENV_OVERWRITE            /* disable vendor parameters protection (serial#, ethaddr) */
62
63 /***********************************************************
64  * Command definition
65  ***********************************************************/
66
67 /* Environment variables */
68
69
70 #define CONFIG_LOADADDR         0x91000000      /* loadaddr env var */
71
72 #define CONFIG_EXTRA_ENV_SETTINGS \
73         "script=boot.scr\0" \
74         "image=zImage\0" \
75         "fdt_file=imx51-ts4800.dtb\0" \
76         "fdt_addr=0x90fe0000\0" \
77         "mmcdev=0\0" \
78         "mmcpart=2\0" \
79         "mmcroot=/dev/mmcblk0p3 rootwait rw\0" \
80         "mmcargs=setenv bootargs root=${mmcroot}\0" \
81         "addtty=setenv bootargs ${bootargs} console=ttymxc0,${baudrate}\0" \
82         "loadbootscript=" \
83                 "fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\0" \
84         "bootscript=echo Running bootscript from mmc ...; " \
85                 "source\0" \
86         "loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image};\0" \
87         "loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
88         "mmcboot=echo Booting from mmc ...; " \
89                 "run mmcargs addtty; " \
90                 "if run loadfdt; then " \
91                         "bootz ${loadaddr} - ${fdt_addr}; " \
92                 "else " \
93                         "echo ERR: cannot load FDT; " \
94                 "fi; "
95
96
97 #define CONFIG_BOOTCOMMAND \
98         "mmc dev ${mmcdev}; if mmc rescan; then " \
99                 "if run loadbootscript; then " \
100                         "run bootscript; " \
101                 "else " \
102                         "if run loadimage; then " \
103                                 "run mmcboot; " \
104                         "fi; " \
105                 "fi; " \
106         "fi; "
107
108 /*
109  * Miscellaneous configurable options
110  */
111
112 #define CONFIG_SYS_LOAD_ADDR            CONFIG_LOADADDR
113
114 /*-----------------------------------------------------------------------
115  * Physical Memory Map
116  */
117 #define PHYS_SDRAM_1            CSD0_BASE_ADDR
118 #define PHYS_SDRAM_1_SIZE       (256 * 1024 * 1024)
119
120 #define CONFIG_SYS_SDRAM_BASE           (PHYS_SDRAM_1)
121 #define CONFIG_SYS_INIT_RAM_ADDR        (IRAM_BASE_ADDR)
122 #define CONFIG_SYS_INIT_RAM_SIZE        (IRAM_SIZE)
123
124 #define CONFIG_SYS_INIT_SP_OFFSET \
125         (CONFIG_SYS_INIT_RAM_SIZE - GENERATED_GBL_DATA_SIZE)
126 #define CONFIG_SYS_INIT_SP_ADDR \
127         (CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
128
129 /* Low level init */
130 #define CONFIG_SYS_DDR_CLKSEL   0
131 #define CONFIG_SYS_CLKTL_CBCDR  0x59E35100
132 #define CONFIG_SYS_MAIN_PWR_ON
133
134 /*-----------------------------------------------------------------------
135  * Environment organization
136  */
137
138 #define CONFIG_ENV_OFFSET      (6 * 64 * 1024)
139 #define CONFIG_ENV_SIZE        (8 * 1024)
140 #define CONFIG_SYS_MMC_ENV_DEV 0
141
142 #endif