Merge git://git.denx.de/u-boot-sunxi
[platform/kernel/u-boot.git] / include / configs / tricorder.h
1 /*
2  * (C) Copyright 2006-2008
3  * Texas Instruments.
4  * Richard Woodruff <r-woodruff2@ti.com>
5  * Syed Mohammed Khasim <x0khasim@ti.com>
6  *
7  * (C) Copyright 2012
8  * Corscience GmbH & Co. KG
9  * Thomas Weber <weber@corscience.de>
10  *
11  * Configuration settings for the Tricorder board.
12  *
13  * SPDX-License-Identifier:     GPL-2.0+
14  */
15
16 #ifndef __CONFIG_H
17 #define __CONFIG_H
18
19 #define CONFIG_MACH_TYPE                MACH_TYPE_TRICORDER
20 /*
21  * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
22  * 64 bytes before this address should be set aside for u-boot.img's
23  * header. That is 0x800FFFC0--0x80100000 should not be used for any
24  * other needs.
25  */
26 #define CONFIG_SYS_TEXT_BASE            0x80100000
27
28 #define CONFIG_SDRC                     /* The chip has SDRC controller */
29
30 #include <asm/arch/cpu.h>               /* get chip and board defs */
31 #include <asm/arch/omap.h>
32
33 /* Clock Defines */
34 #define V_OSCK                          26000000 /* Clock output from T2 */
35 #define V_SCLK                          (V_OSCK >> 1)
36
37 #define CONFIG_MISC_INIT_R
38
39 #define CONFIG_CMDLINE_TAG              /* enable passing of ATAGs */
40 #define CONFIG_SETUP_MEMORY_TAGS
41 #define CONFIG_INITRD_TAG
42 #define CONFIG_REVISION_TAG
43
44 /* Size of malloc() pool */
45 #define CONFIG_SYS_MALLOC_LEN           (1024*1024)
46
47 /* Hardware drivers */
48
49 /* NS16550 Configuration */
50 #define CONFIG_SYS_NS16550_SERIAL
51 #define CONFIG_SYS_NS16550_REG_SIZE     (-4)
52 #define CONFIG_SYS_NS16550_CLK          48000000 /* 48MHz (APLL96/2) */
53
54 /* select serial console configuration */
55 #define CONFIG_CONS_INDEX               3
56 #define CONFIG_SYS_NS16550_COM3         OMAP34XX_UART3
57 #define CONFIG_SERIAL3                  3
58 #define CONFIG_SYS_BAUDRATE_TABLE       {4800, 9600, 19200, 38400, 57600,\
59                                         115200}
60
61 /* I2C */
62 #define CONFIG_SYS_I2C
63 #define CONFIG_SYS_OMAP24_I2C_SPEED     100000
64 #define CONFIG_SYS_OMAP24_I2C_SLAVE     1
65  
66
67 /* EEPROM */
68 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN  2
69 #define CONFIG_SYS_EEPROM_BUS_NUM       1
70
71 /* TWL4030 */
72 #define CONFIG_TWL4030_LED
73
74 /* Board NAND Info */
75 #define CONFIG_MTD_DEVICE               /* needed for mtdparts commands */
76 #define MTDIDS_DEFAULT                  "nand0=omap2-nand.0"
77 #define MTDPARTS_DEFAULT                "mtdparts=omap2-nand.0:" \
78                                                 "128k(SPL)," \
79                                                 "1m(u-boot)," \
80                                                 "384k(u-boot-env1)," \
81                                                 "1152k(mtdoops)," \
82                                                 "384k(u-boot-env2)," \
83                                                 "5m(kernel)," \
84                                                 "2m(fdt)," \
85                                                 "-(ubi)"
86
87 #define CONFIG_NAND_OMAP_GPMC
88 #define CONFIG_SYS_NAND_ADDR            NAND_BASE       /* physical address */
89                                                         /* to access nand */
90 #define CONFIG_SYS_NAND_BASE            NAND_BASE       /* physical address */
91                                                         /* to access nand at */
92                                                         /* CS0 */
93 #define CONFIG_SYS_MAX_NAND_DEVICE      1               /* Max number of NAND */
94                                                         /* devices */
95 #define CONFIG_BCH
96 #define CONFIG_SYS_NAND_MAX_OOBFREE     2
97 #define CONFIG_SYS_NAND_MAX_ECCPOS      56
98
99 /* needed for ubi */
100 #define CONFIG_MTD_DEVICE       /* needed for mtdparts commands */
101 #define CONFIG_MTD_PARTITIONS
102
103 /* Environment information (this is the common part) */
104
105
106 /* hang() the board on panic() */
107 #define CONFIG_PANIC_HANG
108
109 /* environment placement (for NAND), is different for FLASHCARD but does not
110  * harm there */
111 #define CONFIG_ENV_OFFSET               0x120000    /* env start */
112 #define CONFIG_ENV_OFFSET_REDUND        0x2A0000    /* redundant env start */
113 #define CONFIG_ENV_SIZE                 (16 << 10)  /* use 16KiB for env */
114 #define CONFIG_ENV_RANGE                (384 << 10) /* allow badblocks in env */
115
116 /* the loadaddr is the same as CONFIG_SYS_LOAD_ADDR, unfortunately the defiend
117  * value can not be used here! */
118 #define CONFIG_LOADADDR         0x82000000
119
120 #define CONFIG_COMMON_ENV_SETTINGS \
121         "console=ttyO2,115200n8\0" \
122         "mmcdev=0\0" \
123         "vram=3M\0" \
124         "defaultdisplay=lcd\0" \
125         "kernelopts=mtdoops.mtddev=3\0" \
126         "mtdparts=" MTDPARTS_DEFAULT "\0" \
127         "mtdids=" MTDIDS_DEFAULT "\0" \
128         "commonargs=" \
129                 "setenv bootargs console=${console} " \
130                 "${mtdparts} " \
131                 "${kernelopts} " \
132                 "vt.global_cursor_default=0 " \
133                 "vram=${vram} " \
134                 "omapdss.def_disp=${defaultdisplay}\0"
135
136 #define CONFIG_BOOTCOMMAND "run autoboot"
137
138 /* specific environment settings for different use cases
139  * FLASHCARD: used to run a rdimage from sdcard to program the device
140  * 'NORMAL': used to boot kernel from sdcard, nand, ...
141  *
142  * The main aim for the FLASHCARD skin is to have an embedded environment
143  * which will not be influenced by any data already on the device.
144  */
145 #ifdef CONFIG_FLASHCARD
146 /* the rdaddr is 16 MiB before the loadaddr */
147 #define CONFIG_ENV_RDADDR       "rdaddr=0x81000000\0"
148
149 #define CONFIG_EXTRA_ENV_SETTINGS \
150         CONFIG_COMMON_ENV_SETTINGS \
151         CONFIG_ENV_RDADDR \
152         "autoboot=" \
153         "run commonargs; " \
154         "setenv bootargs ${bootargs} " \
155                 "flashy_updateimg=/dev/mmcblk0p1:corscience_update.img " \
156                 "rdinit=/sbin/init; " \
157         "mmc dev ${mmcdev}; mmc rescan; " \
158         "fatload mmc ${mmcdev} ${loadaddr} uImage; " \
159         "fatload mmc ${mmcdev} ${rdaddr} uRamdisk; " \
160         "bootm ${loadaddr} ${rdaddr}\0"
161
162 #else /* CONFIG_FLASHCARD */
163
164 #define CONFIG_ENV_OVERWRITE /* allow to overwrite serial and ethaddr */
165
166 #define CONFIG_EXTRA_ENV_SETTINGS \
167         CONFIG_COMMON_ENV_SETTINGS \
168         "mmcargs=" \
169                 "run commonargs; " \
170                 "setenv bootargs ${bootargs} " \
171                 "root=/dev/mmcblk0p2 " \
172                 "rootwait " \
173                 "rw\0" \
174         "nandargs=" \
175                 "run commonargs; " \
176                 "setenv bootargs ${bootargs} " \
177                 "root=ubi0:root " \
178                 "ubi.mtd=7 " \
179                 "rootfstype=ubifs " \
180                 "ro\0" \
181         "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
182         "bootscript=echo Running bootscript from mmc ...; " \
183                 "source ${loadaddr}\0" \
184         "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
185         "mmcboot=echo Booting from mmc ...; " \
186                 "run mmcargs; " \
187                 "bootm ${loadaddr}\0" \
188         "loaduimage_ubi=ubi part ubi; " \
189                 "ubifsmount ubi:root; " \
190                 "ubifsload ${loadaddr} /boot/uImage\0" \
191         "loaduimage_nand=nand read ${loadaddr} kernel 0x500000\0" \
192         "nandboot=echo Booting from nand ...; " \
193                 "run nandargs; " \
194                 "run loaduimage_nand; " \
195                 "bootm ${loadaddr}\0" \
196         "autoboot=mmc dev ${mmcdev}; if mmc rescan; then " \
197                         "if run loadbootscript; then " \
198                                 "run bootscript; " \
199                         "else " \
200                                 "if run loaduimage; then " \
201                                         "run mmcboot; " \
202                                 "else run nandboot; " \
203                                 "fi; " \
204                         "fi; " \
205                 "else run nandboot; fi\0"
206
207 #endif /* CONFIG_FLASHCARD */
208
209 /* Miscellaneous configurable options */
210 #define CONFIG_SYS_LONGHELP             /* undef to save memory */
211 #define CONFIG_CMDLINE_EDITING          /* enable cmdline history */
212 #define CONFIG_AUTO_COMPLETE
213 #define CONFIG_SYS_CBSIZE               512     /* Console I/O Buffer Size */
214 /* Print Buffer Size */
215 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
216                                         sizeof(CONFIG_SYS_PROMPT) + 16)
217 #define CONFIG_SYS_MAXARGS              16      /* max number of command args */
218
219 /* Boot Argument Buffer Size */
220 #define CONFIG_SYS_BARGSIZE             (CONFIG_SYS_CBSIZE)
221
222 #define CONFIG_SYS_MEMTEST_START        (OMAP34XX_SDRC_CS0 + 0x00000000)
223 #define CONFIG_SYS_MEMTEST_END          (CONFIG_SYS_MEMTEST_START + \
224                                         0x07000000) /* 112 MB */
225
226 #define CONFIG_SYS_LOAD_ADDR            (OMAP34XX_SDRC_CS0 + 0x02000000)
227
228 /*
229  * OMAP3 has 12 GP timers, they can be driven by the system clock
230  * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
231  * This rate is divided by a local divisor.
232  */
233 #define CONFIG_SYS_TIMERBASE            (OMAP34XX_GPT2)
234 #define CONFIG_SYS_PTV                  2 /* Divisor: 2^(PTV+1) => 8 */
235
236 /*  Physical Memory Map  */
237 #define CONFIG_NR_DRAM_BANKS            2 /* CS1 may or may not be populated */
238 #define PHYS_SDRAM_1                    OMAP34XX_SDRC_CS0
239 #define PHYS_SDRAM_2                    OMAP34XX_SDRC_CS1
240
241 /* NAND and environment organization  */
242 #define CONFIG_SYS_MONITOR_LEN          (256 << 10)     /* Reserve 2 sectors */
243
244 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
245 #define CONFIG_SYS_INIT_RAM_ADDR        0x4020f800
246 #define CONFIG_SYS_INIT_RAM_SIZE        0x800
247 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
248                                                 CONFIG_SYS_INIT_RAM_SIZE - \
249                                                 GENERATED_GBL_DATA_SIZE)
250
251 /* SRAM config */
252 #define CONFIG_SYS_SRAM_START           0x40200000
253 #define CONFIG_SYS_SRAM_SIZE            0x10000
254
255 /* Defines for SPL */
256 #define CONFIG_SPL_FRAMEWORK
257 #define CONFIG_SPL_NAND_SIMPLE
258
259 #define CONFIG_SPL_NAND_BASE
260 #define CONFIG_SPL_NAND_DRIVERS
261 #define CONFIG_SPL_NAND_ECC
262 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME        "u-boot.img"
263 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION     1
264
265 #define CONFIG_SPL_TEXT_BASE            0x40200000 /*CONFIG_SYS_SRAM_START*/
266 #define CONFIG_SPL_MAX_SIZE             (SRAM_SCRATCH_SPACE_ADDR - \
267                                          CONFIG_SPL_TEXT_BASE)
268
269 #define CONFIG_SPL_BSS_START_ADDR       0x80000000 /*CONFIG_SYS_SDRAM_BASE*/
270 #define CONFIG_SPL_BSS_MAX_SIZE         0x80000
271
272 /* NAND boot config */
273 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
274 #define CONFIG_SYS_NAND_PAGE_COUNT      64
275 #define CONFIG_SYS_NAND_PAGE_SIZE       2048
276 #define CONFIG_SYS_NAND_OOBSIZE         64
277 #define CONFIG_SYS_NAND_BLOCK_SIZE      (128*1024)
278 #define CONFIG_SYS_NAND_BAD_BLOCK_POS   NAND_LARGE_BADBLOCK_POS
279 #define CONFIG_SYS_NAND_ECCPOS          {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, \
280                                          13, 14, 16, 17, 18, 19, 20, 21, 22, \
281                                          23, 24, 25, 26, 27, 28, 30, 31, 32, \
282                                          33, 34, 35, 36, 37, 38, 39, 40, 41, \
283                                          42, 44, 45, 46, 47, 48, 49, 50, 51, \
284                                          52, 53, 54, 55, 56}
285
286 #define CONFIG_SYS_NAND_ECCSIZE         512
287 #define CONFIG_SYS_NAND_ECCBYTES        13
288 #define CONFIG_NAND_OMAP_ECCSCHEME      OMAP_ECC_BCH8_CODE_HW_DETECTION_SW
289
290 #define CONFIG_SYS_NAND_U_BOOT_START    CONFIG_SYS_TEXT_BASE
291
292 #define CONFIG_SYS_NAND_U_BOOT_OFFS     0x20000
293 #define CONFIG_SYS_NAND_U_BOOT_SIZE     0x100000
294
295 #define CONFIG_SYS_SPL_MALLOC_START     0x80208000
296 #define CONFIG_SYS_SPL_MALLOC_SIZE      0x100000        /* 1 MB */
297
298 #define CONFIG_SYS_ALT_MEMTEST
299 #define CONFIG_SYS_MEMTEST_SCRATCH      0x81000000
300 #endif /* __CONFIG_H */