Merge branch 'master' of git://git.denx.de/u-boot-uniphier
[platform/kernel/u-boot.git] / include / configs / tricorder.h
1 /*
2  * (C) Copyright 2006-2008
3  * Texas Instruments.
4  * Richard Woodruff <r-woodruff2@ti.com>
5  * Syed Mohammed Khasim <x0khasim@ti.com>
6  *
7  * (C) Copyright 2012
8  * Corscience GmbH & Co. KG
9  * Thomas Weber <weber@corscience.de>
10  *
11  * Configuration settings for the Tricorder board.
12  *
13  * SPDX-License-Identifier:     GPL-2.0+
14  */
15
16 #ifndef __CONFIG_H
17 #define __CONFIG_H
18
19 /* High Level Configuration Options */
20 #define CONFIG_SYS_THUMB_BUILD
21 #define CONFIG_OMAP                     /* in a TI OMAP core */
22 #define CONFIG_OMAP_COMMON
23 /* Common ARM Erratas */
24 #define CONFIG_ARM_ERRATA_454179
25 #define CONFIG_ARM_ERRATA_430973
26 #define CONFIG_ARM_ERRATA_621766
27
28 #define CONFIG_MACH_TYPE                MACH_TYPE_TRICORDER
29 /*
30  * 1MB into the SDRAM to allow for SPL's bss at the beginning of SDRAM
31  * 64 bytes before this address should be set aside for u-boot.img's
32  * header. That is 0x800FFFC0--0x80100000 should not be used for any
33  * other needs.
34  */
35 #define CONFIG_SYS_TEXT_BASE            0x80100000
36
37 #define CONFIG_SDRC                     /* The chip has SDRC controller */
38
39 #include <asm/arch/cpu.h>               /* get chip and board defs */
40 #include <asm/arch/omap.h>
41
42 /* Display CPU and Board information */
43 #define CONFIG_DISPLAY_CPUINFO
44 #define CONFIG_DISPLAY_BOARDINFO
45
46 #define CONFIG_SILENT_CONSOLE
47
48 /* Clock Defines */
49 #define V_OSCK                          26000000 /* Clock output from T2 */
50 #define V_SCLK                          (V_OSCK >> 1)
51
52 #define CONFIG_MISC_INIT_R
53
54 #define CONFIG_CMDLINE_TAG              /* enable passing of ATAGs */
55 #define CONFIG_SETUP_MEMORY_TAGS
56 #define CONFIG_INITRD_TAG
57 #define CONFIG_REVISION_TAG
58
59 /* Size of malloc() pool */
60 #define CONFIG_SYS_MALLOC_LEN           (1024*1024)
61
62 /* Hardware drivers */
63
64 /* GPIO support */
65 #define CONFIG_OMAP_GPIO
66
67 /* GPIO banks */
68 #define CONFIG_OMAP3_GPIO_2             /* GPIO32..63 are in GPIO bank 2 */
69
70 /* LED support */
71 #define CONFIG_STATUS_LED
72 #define CONFIG_BOARD_SPECIFIC_LED
73 #define CONFIG_CMD_LED                  /* LED command */
74 #define STATUS_LED_BIT                  (1 << 0)
75 #define STATUS_LED_STATE                STATUS_LED_ON
76 #define STATUS_LED_PERIOD               (CONFIG_SYS_HZ / 2)
77 #define STATUS_LED_BIT1                 (1 << 1)
78 #define STATUS_LED_STATE1               STATUS_LED_ON
79 #define STATUS_LED_PERIOD1              (CONFIG_SYS_HZ / 2)
80 #define STATUS_LED_BIT2                 (1 << 2)
81 #define STATUS_LED_STATE2               STATUS_LED_ON
82 #define STATUS_LED_PERIOD2              (CONFIG_SYS_HZ / 2)
83
84 /* NS16550 Configuration */
85 #define CONFIG_SYS_NS16550_SERIAL
86 #define CONFIG_SYS_NS16550_REG_SIZE     (-4)
87 #define CONFIG_SYS_NS16550_CLK          48000000 /* 48MHz (APLL96/2) */
88
89 /* select serial console configuration */
90 #define CONFIG_CONS_INDEX               3
91 #define CONFIG_SYS_NS16550_COM3         OMAP34XX_UART3
92 #define CONFIG_SERIAL3                  3
93 #define CONFIG_BAUDRATE                 115200
94 #define CONFIG_SYS_BAUDRATE_TABLE       {4800, 9600, 19200, 38400, 57600,\
95                                         115200}
96
97 /* MMC */
98 #define CONFIG_GENERIC_MMC
99 #define CONFIG_MMC
100 #define CONFIG_OMAP_HSMMC
101 #define CONFIG_DOS_PARTITION
102
103 /* I2C */
104 #define CONFIG_SYS_I2C
105 #define CONFIG_SYS_OMAP24_I2C_SPEED     100000
106 #define CONFIG_SYS_OMAP24_I2C_SLAVE     1
107 #define CONFIG_SYS_I2C_OMAP34XX
108  
109
110 /* EEPROM */
111 #define CONFIG_CMD_EEPROM
112 #define CONFIG_SYS_I2C_EEPROM_ADDR_LEN  2
113 #define CONFIG_SYS_EEPROM_BUS_NUM       1
114
115 /* TWL4030 */
116 #define CONFIG_TWL4030_POWER
117 #define CONFIG_TWL4030_LED
118
119 /* Board NAND Info */
120 #define CONFIG_SYS_NO_FLASH             /* no NOR flash */
121 #define CONFIG_MTD_DEVICE               /* needed for mtdparts commands */
122 #define MTDIDS_DEFAULT                  "nand0=omap2-nand.0"
123 #define MTDPARTS_DEFAULT                "mtdparts=omap2-nand.0:" \
124                                                 "128k(SPL)," \
125                                                 "1m(u-boot)," \
126                                                 "384k(u-boot-env1)," \
127                                                 "1152k(mtdoops)," \
128                                                 "384k(u-boot-env2)," \
129                                                 "5m(kernel)," \
130                                                 "2m(fdt)," \
131                                                 "-(ubi)"
132
133 #define CONFIG_NAND_OMAP_GPMC
134 #define CONFIG_SYS_NAND_ADDR            NAND_BASE       /* physical address */
135                                                         /* to access nand */
136 #define CONFIG_SYS_NAND_BASE            NAND_BASE       /* physical address */
137                                                         /* to access nand at */
138                                                         /* CS0 */
139 #define CONFIG_SYS_MAX_NAND_DEVICE      1               /* Max number of NAND */
140                                                         /* devices */
141 #define CONFIG_BCH
142 #define CONFIG_SYS_NAND_MAX_OOBFREE     2
143 #define CONFIG_SYS_NAND_MAX_ECCPOS      56
144
145 /* commands to include */
146 #define CONFIG_CMD_MTDPARTS             /* Enable MTD parts commands */
147 #define CONFIG_CMD_NAND                 /* NAND support */
148 #define CONFIG_CMD_NAND_LOCK_UNLOCK     /* nand (un)lock commands */
149 #define CONFIG_CMD_UBI                  /* UBI commands */
150 #define CONFIG_CMD_UBIFS                /* UBIFS commands */
151 #define CONFIG_LZO                      /* LZO is needed for UBIFS */
152
153 #undef CONFIG_CMD_JFFS2                 /* JFFS2 Support */
154
155 /* needed for ubi */
156 #define CONFIG_RBTREE
157 #define CONFIG_MTD_DEVICE       /* needed for mtdparts commands */
158 #define CONFIG_MTD_PARTITIONS
159
160 /* Environment information (this is the common part) */
161
162
163 /* hang() the board on panic() */
164 #define CONFIG_PANIC_HANG
165
166 /* environment placement (for NAND), is different for FLASHCARD but does not
167  * harm there */
168 #define CONFIG_ENV_OFFSET               0x120000    /* env start */
169 #define CONFIG_ENV_OFFSET_REDUND        0x2A0000    /* redundant env start */
170 #define CONFIG_ENV_SIZE                 (16 << 10)  /* use 16KiB for env */
171 #define CONFIG_ENV_RANGE                (384 << 10) /* allow badblocks in env */
172
173 /* the loadaddr is the same as CONFIG_SYS_LOAD_ADDR, unfortunately the defiend
174  * value can not be used here! */
175 #define CONFIG_LOADADDR         0x82000000
176
177 #define CONFIG_COMMON_ENV_SETTINGS \
178         "console=ttyO2,115200n8\0" \
179         "mmcdev=0\0" \
180         "vram=3M\0" \
181         "defaultdisplay=lcd\0" \
182         "kernelopts=mtdoops.mtddev=3\0" \
183         "mtdparts=" MTDPARTS_DEFAULT "\0" \
184         "mtdids=" MTDIDS_DEFAULT "\0" \
185         "commonargs=" \
186                 "setenv bootargs console=${console} " \
187                 "${mtdparts} " \
188                 "${kernelopts} " \
189                 "vt.global_cursor_default=0 " \
190                 "vram=${vram} " \
191                 "omapdss.def_disp=${defaultdisplay}\0"
192
193 #define CONFIG_BOOTCOMMAND "run autoboot"
194
195 /* specific environment settings for different use cases
196  * FLASHCARD: used to run a rdimage from sdcard to program the device
197  * 'NORMAL': used to boot kernel from sdcard, nand, ...
198  *
199  * The main aim for the FLASHCARD skin is to have an embedded environment
200  * which will not be influenced by any data already on the device.
201  */
202 #ifdef CONFIG_FLASHCARD
203
204 #define CONFIG_ENV_IS_NOWHERE
205
206 /* the rdaddr is 16 MiB before the loadaddr */
207 #define CONFIG_ENV_RDADDR       "rdaddr=0x81000000\0"
208
209 #define CONFIG_EXTRA_ENV_SETTINGS \
210         CONFIG_COMMON_ENV_SETTINGS \
211         CONFIG_ENV_RDADDR \
212         "autoboot=" \
213         "run commonargs; " \
214         "setenv bootargs ${bootargs} " \
215                 "flashy_updateimg=/dev/mmcblk0p1:corscience_update.img " \
216                 "rdinit=/sbin/init; " \
217         "mmc dev ${mmcdev}; mmc rescan; " \
218         "fatload mmc ${mmcdev} ${loadaddr} uImage; " \
219         "fatload mmc ${mmcdev} ${rdaddr} uRamdisk; " \
220         "bootm ${loadaddr} ${rdaddr}\0"
221
222 #else /* CONFIG_FLASHCARD */
223
224 #define CONFIG_ENV_OVERWRITE /* allow to overwrite serial and ethaddr */
225
226 #define CONFIG_ENV_IS_IN_NAND
227
228 #define CONFIG_EXTRA_ENV_SETTINGS \
229         CONFIG_COMMON_ENV_SETTINGS \
230         "mmcargs=" \
231                 "run commonargs; " \
232                 "setenv bootargs ${bootargs} " \
233                 "root=/dev/mmcblk0p2 " \
234                 "rootwait " \
235                 "rw\0" \
236         "nandargs=" \
237                 "run commonargs; " \
238                 "setenv bootargs ${bootargs} " \
239                 "root=ubi0:root " \
240                 "ubi.mtd=7 " \
241                 "rootfstype=ubifs " \
242                 "ro\0" \
243         "loadbootscript=fatload mmc ${mmcdev} ${loadaddr} boot.scr\0" \
244         "bootscript=echo Running bootscript from mmc ...; " \
245                 "source ${loadaddr}\0" \
246         "loaduimage=fatload mmc ${mmcdev} ${loadaddr} uImage\0" \
247         "mmcboot=echo Booting from mmc ...; " \
248                 "run mmcargs; " \
249                 "bootm ${loadaddr}\0" \
250         "loaduimage_ubi=ubi part ubi; " \
251                 "ubifsmount ubi:root; " \
252                 "ubifsload ${loadaddr} /boot/uImage\0" \
253         "loaduimage_nand=nand read ${loadaddr} kernel 0x500000\0" \
254         "nandboot=echo Booting from nand ...; " \
255                 "run nandargs; " \
256                 "run loaduimage_nand; " \
257                 "bootm ${loadaddr}\0" \
258         "autoboot=mmc dev ${mmcdev}; if mmc rescan; then " \
259                         "if run loadbootscript; then " \
260                                 "run bootscript; " \
261                         "else " \
262                                 "if run loaduimage; then " \
263                                         "run mmcboot; " \
264                                 "else run nandboot; " \
265                                 "fi; " \
266                         "fi; " \
267                 "else run nandboot; fi\0"
268
269 #endif /* CONFIG_FLASHCARD */
270
271 /* Miscellaneous configurable options */
272 #define CONFIG_SYS_LONGHELP             /* undef to save memory */
273 #define CONFIG_CMDLINE_EDITING          /* enable cmdline history */
274 #define CONFIG_AUTO_COMPLETE
275 #define CONFIG_SYS_CBSIZE               512     /* Console I/O Buffer Size */
276 /* Print Buffer Size */
277 #define CONFIG_SYS_PBSIZE               (CONFIG_SYS_CBSIZE + \
278                                         sizeof(CONFIG_SYS_PROMPT) + 16)
279 #define CONFIG_SYS_MAXARGS              16      /* max number of command args */
280
281 /* Boot Argument Buffer Size */
282 #define CONFIG_SYS_BARGSIZE             (CONFIG_SYS_CBSIZE)
283
284 #define CONFIG_SYS_MEMTEST_START        (OMAP34XX_SDRC_CS0 + 0x00000000)
285 #define CONFIG_SYS_MEMTEST_END          (CONFIG_SYS_MEMTEST_START + \
286                                         0x07000000) /* 112 MB */
287
288 #define CONFIG_SYS_LOAD_ADDR            (OMAP34XX_SDRC_CS0 + 0x02000000)
289
290 /*
291  * OMAP3 has 12 GP timers, they can be driven by the system clock
292  * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
293  * This rate is divided by a local divisor.
294  */
295 #define CONFIG_SYS_TIMERBASE            (OMAP34XX_GPT2)
296 #define CONFIG_SYS_PTV                  2 /* Divisor: 2^(PTV+1) => 8 */
297
298 /*  Physical Memory Map  */
299 #define CONFIG_NR_DRAM_BANKS            2 /* CS1 may or may not be populated */
300 #define PHYS_SDRAM_1                    OMAP34XX_SDRC_CS0
301 #define PHYS_SDRAM_2                    OMAP34XX_SDRC_CS1
302
303 /* NAND and environment organization  */
304 #define CONFIG_SYS_MONITOR_LEN          (256 << 10)     /* Reserve 2 sectors */
305
306 #define CONFIG_SYS_SDRAM_BASE           PHYS_SDRAM_1
307 #define CONFIG_SYS_INIT_RAM_ADDR        0x4020f800
308 #define CONFIG_SYS_INIT_RAM_SIZE        0x800
309 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
310                                                 CONFIG_SYS_INIT_RAM_SIZE - \
311                                                 GENERATED_GBL_DATA_SIZE)
312
313 /* SRAM config */
314 #define CONFIG_SYS_SRAM_START           0x40200000
315 #define CONFIG_SYS_SRAM_SIZE            0x10000
316
317 /* Defines for SPL */
318 #define CONFIG_SPL_FRAMEWORK
319 #define CONFIG_SPL_NAND_SIMPLE
320
321 #define CONFIG_SPL_BOARD_INIT
322 #define CONFIG_SPL_NAND_BASE
323 #define CONFIG_SPL_NAND_DRIVERS
324 #define CONFIG_SPL_NAND_ECC
325 #define CONFIG_SPL_LDSCRIPT             "$(CPUDIR)/omap-common/u-boot-spl.lds"
326 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME        "u-boot.img"
327 #define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION     1
328 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 0x300 /* address 0x60000 */
329
330 #define CONFIG_SPL_TEXT_BASE            0x40200000 /*CONFIG_SYS_SRAM_START*/
331 #define CONFIG_SPL_MAX_SIZE             (SRAM_SCRATCH_SPACE_ADDR - \
332                                          CONFIG_SPL_TEXT_BASE)
333
334 #define CONFIG_SPL_BSS_START_ADDR       0x80000000 /*CONFIG_SYS_SDRAM_BASE*/
335 #define CONFIG_SPL_BSS_MAX_SIZE         0x80000
336
337 /* NAND boot config */
338 #define CONFIG_SYS_NAND_5_ADDR_CYCLE
339 #define CONFIG_SYS_NAND_PAGE_COUNT      64
340 #define CONFIG_SYS_NAND_PAGE_SIZE       2048
341 #define CONFIG_SYS_NAND_OOBSIZE         64
342 #define CONFIG_SYS_NAND_BLOCK_SIZE      (128*1024)
343 #define CONFIG_SYS_NAND_BAD_BLOCK_POS   NAND_LARGE_BADBLOCK_POS
344 #define CONFIG_SYS_NAND_ECCPOS          {2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, \
345                                          13, 14, 16, 17, 18, 19, 20, 21, 22, \
346                                          23, 24, 25, 26, 27, 28, 30, 31, 32, \
347                                          33, 34, 35, 36, 37, 38, 39, 40, 41, \
348                                          42, 44, 45, 46, 47, 48, 49, 50, 51, \
349                                          52, 53, 54, 55, 56}
350
351 #define CONFIG_SYS_NAND_ECCSIZE         512
352 #define CONFIG_SYS_NAND_ECCBYTES        13
353 #define CONFIG_NAND_OMAP_ECCSCHEME      OMAP_ECC_BCH8_CODE_HW_DETECTION_SW
354
355 #define CONFIG_SYS_NAND_U_BOOT_START    CONFIG_SYS_TEXT_BASE
356
357 #define CONFIG_SYS_NAND_U_BOOT_OFFS     0x20000
358 #define CONFIG_SYS_NAND_U_BOOT_SIZE     0x100000
359
360 #define CONFIG_SYS_SPL_MALLOC_START     0x80208000
361 #define CONFIG_SYS_SPL_MALLOC_SIZE      0x100000        /* 1 MB */
362
363 #define CONFIG_SYS_ALT_MEMTEST
364 #define CONFIG_SYS_MEMTEST_SCRATCH      0x81000000
365 #endif /* __CONFIG_H */