2 * Copyright (C) 2013 Samsung Electronics
3 * Sanghee Kim <sh0130.kim@samsung.com>
4 * Piotr Wilczek <p.wilczek@samsung.com>
6 * Configuation settings for the SAMSUNG TRATS2 (EXYNOS4412) board.
8 * SPDX-License-Identifier: GPL-2.0+
15 * High Level Configuration Options
18 #define CONFIG_SAMSUNG /* in a SAMSUNG core */
19 #define CONFIG_S5P /* which is in a S5P Family */
20 #define CONFIG_EXYNOS4 /* which is in a EXYNOS4XXX */
21 #define CONFIG_TIZEN /* TIZEN lib */
23 #include <asm/arch/cpu.h> /* get chip and board defs */
25 #define CONFIG_ARCH_CPU_INIT
26 #define CONFIG_DISPLAY_CPUINFO
27 #define CONFIG_DISPLAY_BOARDINFO
29 #define CONFIG_SKIP_LOWLEVEL_INIT
31 #define CONFIG_SYS_CACHELINE_SIZE 32
33 #ifndef CONFIG_SYS_L2CACHE_OFF
34 #define CONFIG_SYS_L2_PL310
35 #define CONFIG_SYS_PL310_BASE 0x10502000
38 #define CONFIG_NR_DRAM_BANKS 4
39 #define PHYS_SDRAM_1 0x40000000 /* LDDDR2 DMC 0 */
40 #define PHYS_SDRAM_1_SIZE (256 << 20) /* 256 MB in CS 0 */
41 #define PHYS_SDRAM_2 0x50000000 /* LPDDR2 DMC 1 */
42 #define PHYS_SDRAM_2_SIZE (256 << 20) /* 256 MB in CS 0 */
43 #define PHYS_SDRAM_3 0x60000000 /* LPDDR2 DMC 1 */
44 #define PHYS_SDRAM_3_SIZE (256 << 20) /* 256 MB in CS 0 */
45 #define PHYS_SDRAM_4 0x70000000 /* LPDDR2 DMC 1 */
46 #define PHYS_SDRAM_4_SIZE (256 << 20) /* 256 MB in CS 0 */
47 #define PHYS_SDRAM_END 0x80000000
49 #define CONFIG_SYS_MEM_TOP_HIDE (1 << 20) /* ram console */
51 #define CONFIG_SYS_SDRAM_BASE (PHYS_SDRAM_1)
52 #define CONFIG_SYS_TEXT_BASE 0x78100000
54 #define CONFIG_SYS_CLK_FREQ 24000000
56 #define CONFIG_SETUP_MEMORY_TAGS
57 #define CONFIG_CMDLINE_TAG
58 #define CONFIG_REVISION_TAG
60 /* MACH_TYPE_TRATS2 */
61 #define MACH_TYPE_TRATS2 3765
62 #define CONFIG_MACH_TYPE MACH_TYPE_TRATS2
64 #define CONFIG_DISPLAY_CPUINFO
66 #include <asm/sizes.h>
67 /* Size of malloc() pool */
68 #define CONFIG_SYS_MALLOC_LEN (CONFIG_ENV_SIZE + (80 * SZ_1M))
70 /* select serial console configuration */
71 #define CONFIG_SERIAL2
73 #define CONFIG_SYS_HUSH_PARSER /* use "hush" command parser */
74 #define CONFIG_SYS_PROMPT_HUSH_PS2 "> "
76 #define CONFIG_CMDLINE_EDITING
78 #define CONFIG_BAUDRATE 115200
80 /* It should define before config_cmd_default.h */
81 #define CONFIG_SYS_NO_FLASH
83 /***********************************************************
85 ***********************************************************/
86 #include <config_cmd_default.h>
88 #undef CONFIG_CMD_ECHO
89 #undef CONFIG_CMD_FPGA
90 #undef CONFIG_CMD_FLASH
91 #undef CONFIG_CMD_IMLS
92 #undef CONFIG_CMD_NAND
93 #undef CONFIG_CMD_MISC
95 #undef CONFIG_CMD_SOURCE
96 #undef CONFIG_CMD_XIMG
97 #define CONFIG_CMD_CACHE
98 #define CONFIG_CMD_I2C
99 #define CONFIG_CMD_MMC
100 #define CONFIG_CMD_DFU
101 #define CONFIG_CMD_GPT
102 #define CONFIG_CMD_PMIC
104 #define CONFIG_BOOTDELAY 3
105 #define CONFIG_ZERO_BOOTDELAY_CHECK
107 #define CONFIG_CMD_FAT
108 #define CONFIG_FAT_WRITE
111 #define CONFIG_CMD_EXT4
112 #define CONFIG_CMD_EXT4_WRITE
114 /* USB Composite download gadget - g_dnl */
115 #define CONFIG_USBDOWNLOAD_GADGET
116 #define CONFIG_SYS_DFU_DATA_BUF_SIZE SZ_32M
117 #define CONFIG_DFU_FUNCTION
118 #define CONFIG_DFU_MMC
120 /* TIZEN THOR downloader support */
121 #define CONFIG_CMD_THOR_DOWNLOAD
122 #define CONFIG_THOR_FUNCTION
124 /* USB Samsung's IDs */
125 #define CONFIG_G_DNL_VENDOR_NUM 0x04E8
126 #define CONFIG_G_DNL_PRODUCT_NUM 0x6601
127 #define CONFIG_G_DNL_THOR_VENDOR_NUM CONFIG_G_DNL_VENDOR_NUM
128 #define CONFIG_G_DNL_THOR_PRODUCT_NUM 0x685D
129 #define CONFIG_G_DNL_MANUFACTURER "Samsung"
131 /* To use the TFTPBOOT over USB, Please enable the CONFIG_CMD_NET */
132 #undef CONFIG_CMD_NET
135 #define CONFIG_GENERIC_MMC
137 #define CONFIG_S5P_SDHCI
139 #define CONFIG_MMC_SDMA
140 #define CONFIG_MMC_DEFAULT_DEV 0
145 #define CONFIG_BOOTARGS "Please use defined boot"
146 #define CONFIG_BOOTCOMMAND "run mmcboot"
147 #define CONFIG_DEFAULT_CONSOLE "console=ttySAC2,115200n8\0"
149 #define CONFIG_ENV_OVERWRITE
150 #define CONFIG_SYS_CONSOLE_INFO_QUIET
151 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
153 /* Tizen - partitions definitions */
154 #define PARTS_CSA "csa-mmc"
155 #define PARTS_BOOTLOADER "u-boot"
156 #define PARTS_BOOT "boot"
157 #define PARTS_ROOT "platform"
158 #define PARTS_DATA "data"
159 #define PARTS_CSC "csc"
160 #define PARTS_UMS "ums"
162 #define PARTS_DEFAULT \
163 "uuid_disk=${uuid_gpt_disk};" \
164 "name="PARTS_CSA",size=8MiB,uuid=${uuid_gpt_"PARTS_CSA"};" \
165 "name="PARTS_BOOTLOADER",size=60MiB," \
166 "uuid=${uuid_gpt_"PARTS_BOOTLOADER"};" \
167 "name="PARTS_BOOT",size=100MiB,uuid=${uuid_gpt_"PARTS_BOOT"};" \
168 "name="PARTS_ROOT",size=1GiB,uuid=${uuid_gpt_"PARTS_ROOT"};" \
169 "name="PARTS_DATA",size=3GiB,uuid=${uuid_gpt_"PARTS_DATA"};" \
170 "name="PARTS_CSC",size=150MiB,uuid=${uuid_gpt_"PARTS_CSC"};" \
171 "name="PARTS_UMS",size=-,uuid=${uuid_gpt_"PARTS_UMS"}\0" \
173 #define CONFIG_DFU_ALT \
174 "u-boot mmc 80 800;" \
176 "exynos4412-trats2.dtb ext4 0 2;" \
177 ""PARTS_ROOT" part 0 5\0"
179 #define CONFIG_EXTRA_ENV_SETTINGS \
181 "run loaddtb; run loaduimage; bootm 0x40007FC0 - ${fdtaddr}\0" \
183 "mmc boot 0 1 1 1; mmc write 0x42008000 0 0x200;" \
184 "mmc boot 0 1 1 0\0" \
186 "mmc boot 0 1 1 2; mmc write 0x42100000 0 0x200;" \
187 " mmc boot 0 1 1 0\0" \
189 "mmc read 0x51000000 0x80 0x200; run updatebackup\0" \
191 "mmc write 0x50000000 0x80 0x400\0" \
193 "setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \
194 "${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo}; " \
195 "run loaddtb; run loaduimage; bootm 0x40007FC0 - ${fdtaddr}\0" \
196 "bootchart=set opts init=/sbin/bootchartd; run bootcmd\0" \
197 "boottrace=setenv opts initcall_debug; run bootcmd\0" \
199 "rootfstype=ext4\0" \
200 "console=" CONFIG_DEFAULT_CONSOLE \
201 "kernelname=uImage\0" \
202 "loaduimage=ext4load mmc ${mmcdev}:${mmcbootpart} 0x40007FC0 uImage\0" \
203 "0x40007FC0 ${kernelname}\0" \
204 "loaddtb=ext4load mmc ${mmcdev}:${mmcbootpart} ${fdtaddr} " \
209 "opts=always_resume=1\0" \
210 "partitions=" PARTS_DEFAULT \
211 "dfu_alt_info=" CONFIG_DFU_ALT \
214 "consoleon=set console console=ttySAC2,115200n8; save; reset\0" \
215 "consoleoff=set console console=ram; save; reset\0" \
216 "spladdr=0x40000100\0" \
218 "splfile=falcon.bin\0" \
220 "setexpr spl_imgsize ${splsize} + 8 ;" \
221 "setenv spl_imgsize 0x${spl_imgsize};" \
222 "setexpr spl_imgaddr ${spladdr} - 8 ;" \
223 "setexpr spl_addr_tmp ${spladdr} - 4 ;" \
224 "mw.b ${spl_imgaddr} 0x00 ${spl_imgsize};run loaduimage;" \
225 "setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \
226 "${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo};" \
227 "spl export atags 0x40007FC0;" \
228 "crc32 ${spladdr} ${splsize} ${spl_imgaddr};" \
229 "mw.l ${spl_addr_tmp} ${splsize};" \
230 "ext4write mmc ${mmcdev}:${mmcbootpart}" \
231 " /${splfile} ${spl_imgaddr} ${spl_imgsize};" \
232 "setenv spl_imgsize;" \
233 "setenv spl_imgaddr;" \
234 "setenv spl_addr_tmp;\0" \
235 "fdtaddr=40800000\0" \
236 "fdtfile=exynos4412-trats2.dtb\0"
239 * Miscellaneous configurable options
241 #define CONFIG_SYS_LONGHELP /* undef to save memory */
242 #define CONFIG_SYS_PROMPT "Trats2 # " /* Monitor Command Prompt */
243 #define CONFIG_SYS_CBSIZE 256 /* Console I/O Buffer Size */
244 #define CONFIG_SYS_PBSIZE 384 /* Print Buffer Size */
245 #define CONFIG_SYS_MAXARGS 32 /* max number of command args */
247 /* Boot Argument Buffer Size */
248 #define CONFIG_SYS_BARGSIZE CONFIG_SYS_CBSIZE
250 /* memtest works on */
251 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
252 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x5000000)
253 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x4800000)
255 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR \
256 - GENERATED_GBL_DATA_SIZE)
258 /* valid baudrates */
259 #define CONFIG_SYS_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
261 #define CONFIG_SYS_MONITOR_BASE 0x00000000
263 /*-----------------------------------------------------------------------
264 * FLASH and environment organization
267 #define CONFIG_SYS_MONITOR_LEN (256 << 10) /* Reserve 2 sectors */
269 #define CONFIG_ENV_IS_IN_MMC
270 #define CONFIG_SYS_MMC_ENV_DEV CONFIG_MMC_DEFAULT_DEV
271 #define CONFIG_ENV_SIZE 4096
272 #define CONFIG_ENV_OFFSET ((32 - 4) << 10) /* 32KiB - 4KiB */
273 #define CONFIG_EFI_PARTITION
274 #define CONFIG_PARTITION_UUIDS
276 #define CONFIG_MISC_INIT_R
277 #define CONFIG_BOARD_EARLY_INIT_F
280 #include <asm/arch/gpio.h>
282 #define CONFIG_SYS_I2C
283 #define CONFIG_SYS_I2C_SOFT /* I2C bit-banged */
284 #define CONFIG_SYS_I2C_SOFT_SPEED 50000
285 #define CONFIG_SYS_I2C_SOFT_SLAVE 0x00
286 #define I2C_SOFT_DECLARATIONS2
287 #define CONFIG_SYS_I2C_SOFT_SPEED_2 50000
288 #define CONFIG_SYS_I2C_SOFT_SLAVE_2 0x00
289 #define I2C_SOFT_DECLARATIONS3
290 #define CONFIG_SYS_I2C_SOFT_SPEED_3 50000
291 #define CONFIG_SYS_I2C_SOFT_SLAVE_3 0x00
292 #define CONFIG_SOFT_I2C_READ_REPEATED_START
293 #define CONFIG_SYS_I2C_INIT_BOARD
294 #define CONFIG_I2C_MULTI_BUS
295 #define CONFIG_SOFT_I2C_MULTI_BUS
296 #define CONFIG_SYS_MAX_I2C_BUS 15
298 #define CONFIG_SOFT_I2C_I2C5_SCL exynos4x12_gpio_part1_get_nr(d0, 3)
299 #define CONFIG_SOFT_I2C_I2C5_SDA exynos4x12_gpio_part1_get_nr(d0, 2)
300 #define CONFIG_SOFT_I2C_I2C9_SCL exynos4x12_gpio_part1_get_nr(f1, 4)
301 #define CONFIG_SOFT_I2C_I2C9_SDA exynos4x12_gpio_part1_get_nr(f1, 5)
302 #define CONFIG_SOFT_I2C_I2C10_SCL exynos4x12_gpio_part2_get_nr(m2, 1)
303 #define CONFIG_SOFT_I2C_I2C10_SDA exynos4x12_gpio_part2_get_nr(m2, 0)
304 #define CONFIG_SOFT_I2C_GPIO_SCL get_multi_scl_pin()
305 #define CONFIG_SOFT_I2C_GPIO_SDA get_multi_sda_pin()
306 #define I2C_INIT multi_i2c_init()
310 #define CONFIG_POWER_I2C
311 #define CONFIG_POWER_MAX77686
312 #define CONFIG_POWER_PMIC_MAX77693
313 #define CONFIG_POWER_MUIC_MAX77693
314 #define CONFIG_POWER_FG_MAX77693
315 #define CONFIG_POWER_BATTERY_TRATS2
316 #define CONFIG_USB_GADGET
317 #define CONFIG_USB_GADGET_S3C_UDC_OTG
318 #define CONFIG_USB_GADGET_DUALSPEED
319 #define CONFIG_USB_GADGET_VBUS_DRAW 2
320 #define CONFIG_USB_CABLE_CHECK
323 #define CONFIG_EXYNOS_FB
325 #define CONFIG_CMD_BMP
326 #define CONFIG_BMP_32BPP
327 #define CONFIG_FB_ADDR 0x52504000
328 #define CONFIG_S6E8AX0
329 #define CONFIG_EXYNOS_MIPI_DSIM
330 #define CONFIG_VIDEO_BMP_GZIP
331 #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE ((500 * 250 * 4) + (1 << 12))
333 #define CONFIG_CMD_USB_MASS_STORAGE
334 #define CONFIG_USB_GADGET_MASS_STORAGE
336 /* Pass open firmware flat tree */
337 #define CONFIG_OF_LIBFDT 1
339 #endif /* __CONFIG_H */