1 /* SPDX-License-Identifier: GPL-2.0+ */
3 * Copyright (C) 2013 Samsung Electronics
4 * Sanghee Kim <sh0130.kim@samsung.com>
5 * Piotr Wilczek <p.wilczek@samsung.com>
7 * Configuation settings for the SAMSUNG TRATS2 (EXYNOS4412) board.
10 #ifndef __CONFIG_TRATS2_H
11 #define __CONFIG_TRATS2_H
13 #include <configs/exynos4-common.h>
15 #define CONFIG_TIZEN /* TIZEN lib */
17 #define CONFIG_SYS_L2CACHE_OFF
18 #ifndef CONFIG_SYS_L2CACHE_OFF
19 #define CONFIG_SYS_L2_PL310
20 #define CONFIG_SYS_PL310_BASE 0x10502000
23 /* TRATS2 has 4 banks of DRAM */
24 #define CONFIG_SYS_SDRAM_BASE 0x40000000
25 #define PHYS_SDRAM_1 CONFIG_SYS_SDRAM_BASE
26 #define SDRAM_BANK_SIZE (256 << 20) /* 256 MB */
27 /* memtest works on */
28 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
29 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_SDRAM_BASE + 0x5E00000)
30 #define CONFIG_SYS_LOAD_ADDR (CONFIG_SYS_SDRAM_BASE + 0x3E00000)
32 /* select serial console configuration */
33 #define CONFIG_SERIAL2
35 /* Console configuration */
37 #define CONFIG_BOOTCOMMAND "run autoboot"
38 #define CONFIG_DEFAULT_CONSOLE "ttySAC2,115200n8"
40 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR \
41 - GENERATED_GBL_DATA_SIZE)
43 #define CONFIG_SYS_MEM_TOP_HIDE (1 << 20) /* ram console */
45 #define CONFIG_SYS_MONITOR_BASE 0x00000000
47 #define CONFIG_SYS_MMC_ENV_DEV CONFIG_MMC_DEFAULT_DEV
48 #define CONFIG_ENV_SIZE 4096
49 #define CONFIG_ENV_OFFSET ((32 - 4) << 10) /* 32KiB - 4KiB */
51 #define CONFIG_ENV_OVERWRITE
53 /* Tizen - partitions definitions */
54 #define PARTS_CSA "csa-mmc"
55 #define PARTS_BOOT "boot"
56 #define PARTS_QBOOT "qboot"
57 #define PARTS_CSC "csc"
58 #define PARTS_ROOT "platform"
59 #define PARTS_DATA "data"
60 #define PARTS_UMS "ums"
62 #define PARTS_DEFAULT \
63 "uuid_disk=${uuid_gpt_disk};" \
64 "name="PARTS_CSA",start=5MiB,size=8MiB,uuid=${uuid_gpt_"PARTS_CSA"};" \
65 "name="PARTS_BOOT",size=60MiB,uuid=${uuid_gpt_"PARTS_BOOT"};" \
66 "name="PARTS_QBOOT",size=100MiB,uuid=${uuid_gpt_"PARTS_QBOOT"};" \
67 "name="PARTS_CSC",size=150MiB,uuid=${uuid_gpt_"PARTS_CSC"};" \
68 "name="PARTS_ROOT",size=1536MiB,uuid=${uuid_gpt_"PARTS_ROOT"};" \
69 "name="PARTS_DATA",size=3000MiB,uuid=${uuid_gpt_"PARTS_DATA"};" \
70 "name="PARTS_UMS",size=-,uuid=${uuid_gpt_"PARTS_UMS"}\0" \
72 #define CONFIG_DFU_ALT \
73 "u-boot raw 0x80 0x800;" \
75 "/modem.bin ext4 0 2;" \
76 "/exynos4412-trats2.dtb ext4 0 2;" \
77 ""PARTS_CSA" part 0 1;" \
78 ""PARTS_BOOT" part 0 2;" \
79 ""PARTS_QBOOT" part 0 3;" \
80 ""PARTS_CSC" part 0 4;" \
81 ""PARTS_ROOT" part 0 5;" \
82 ""PARTS_DATA" part 0 6;" \
83 ""PARTS_UMS" part 0 7;" \
84 "params.bin raw 0x38 0x8;" \
85 "/Image.itb ext4 0 2\0"
87 #define CONFIG_EXTRA_ENV_SETTINGS \
90 "if run loaddtb; then " \
91 "bootm 0x40007FC0 - ${fdtaddr};" \
93 "bootm 0x40007FC0;\0" \
95 "mmc dev 0 2; mmc write 0x51000000 0 0x800;" \
98 "mmc read 0x51000000 0x80 0x800; run updatebackup\0" \
100 "setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \
101 "${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo}; " \
103 "bootchart=set opts init=/sbin/bootchartd; run bootcmd\0" \
104 "boottrace=setenv opts initcall_debug; run bootcmd\0" \
106 "rootfstype=ext4\0" \
107 "console=" CONFIG_DEFAULT_CONSOLE "\0" \
108 "kernelname=uImage\0" \
109 "loaduimage=ext4load mmc ${mmcdev}:${mmcbootpart} 0x40007FC0 " \
111 "loaddtb=ext4load mmc ${mmcdev}:${mmcbootpart} ${fdtaddr} " \
113 "mmcdev=" __stringify(CONFIG_MMC_DEFAULT_DEV) "\0" \
116 "opts=always_resume=1\0" \
117 "partitions=" PARTS_DEFAULT \
118 "dfu_alt_info=" CONFIG_DFU_ALT \
121 "consoleon=set console console=ttySAC2,115200n8; save; reset\0" \
122 "consoleoff=set console console=ram; save; reset\0" \
123 "spladdr=0x40000100\0" \
125 "splfile=falcon.bin\0" \
127 "setexpr spl_imgsize ${splsize} + 8 ;" \
128 "setenv spl_imgsize 0x${spl_imgsize};" \
129 "setexpr spl_imgaddr ${spladdr} - 8 ;" \
130 "setexpr spl_addr_tmp ${spladdr} - 4 ;" \
131 "mw.b ${spl_imgaddr} 0x00 ${spl_imgsize};run loaduimage;" \
132 "setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \
133 "${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo};" \
134 "spl export atags 0x40007FC0;" \
135 "crc32 ${spladdr} ${splsize} ${spl_imgaddr};" \
136 "mw.l ${spl_addr_tmp} ${splsize};" \
137 "ext4write mmc ${mmcdev}:${mmcbootpart}" \
138 " /${splfile} ${spl_imgaddr} ${spl_imgsize};" \
139 "setenv spl_imgsize;" \
140 "setenv spl_imgaddr;" \
141 "setenv spl_addr_tmp;\0" \
142 CONFIG_EXTRA_ENV_ITB \
143 "fdtaddr=40800000\0" \
147 /* Security subsystem - enable hw_rand() */
148 #define CONFIG_EXYNOS_ACE_SHA
150 /* Common misc for Samsung */
151 #define CONFIG_MISC_COMMON
153 #define CONFIG_MISC_INIT_R
155 /* Download menu - Samsung common */
156 #define CONFIG_LCD_MENU
158 /* Download menu - definitions for check keys */
161 #define KEY_PWR_PMIC_NAME "MAX77686_PMIC"
162 #define KEY_PWR_STATUS_REG MAX77686_REG_PMIC_STATUS1
163 #define KEY_PWR_STATUS_MASK (1 << 0)
164 #define KEY_PWR_INTERRUPT_REG MAX77686_REG_PMIC_INT1
165 #define KEY_PWR_INTERRUPT_MASK (1 << 1)
167 #define KEY_VOL_UP_GPIO EXYNOS4X12_GPIO_X22
168 #define KEY_VOL_DOWN_GPIO EXYNOS4X12_GPIO_X33
169 #endif /* __ASSEMBLY__ */
172 #define LCD_BPP LCD_COLOR16
175 #define CONFIG_BMP_16BPP
176 #define CONFIG_FB_ADDR 0x52504000
177 #define CONFIG_EXYNOS_MIPI_DSIM
178 #define CONFIG_VIDEO_BMP_GZIP
179 #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE ((500 * 160 * 4) + 54)
181 #endif /* __CONFIG_H */