Merge branch 'master' of git://git.denx.de/u-boot-video
[platform/kernel/u-boot.git] / include / configs / trats.h
1 /*
2  * Copyright (C) 2011 Samsung Electronics
3  * Heungjun Kim <riverful.kim@samsung.com>
4  *
5  * Configuation settings for the SAMSUNG TRATS (EXYNOS4210) board.
6  *
7  * SPDX-License-Identifier:     GPL-2.0+
8  */
9
10 #ifndef __CONFIG_TRATS_H
11 #define __CONFIG_TRATS_H
12
13 #include <configs/exynos4-common.h>
14
15 #define CONFIG_TRATS
16
17 #define CONFIG_TIZEN                    /* TIZEN lib */
18
19 #define CONFIG_SYS_L2CACHE_OFF
20 #ifndef CONFIG_SYS_L2CACHE_OFF
21 #define CONFIG_SYS_L2_PL310
22 #define CONFIG_SYS_PL310_BASE   0x10502000
23 #endif
24
25 /* TRATS has 4 banks of DRAM */
26 #define CONFIG_NR_DRAM_BANKS            4
27 #define CONFIG_SYS_SDRAM_BASE           0x40000000
28 #define PHYS_SDRAM_1                    CONFIG_SYS_SDRAM_BASE
29 #define CONFIG_SYS_TEXT_BASE            0x63300000
30 #define SDRAM_BANK_SIZE                 (256 << 20)     /* 256 MB */
31
32 /* memtest works on */
33 #define CONFIG_SYS_MEMTEST_START        CONFIG_SYS_SDRAM_BASE
34 #define CONFIG_SYS_MEMTEST_END          (CONFIG_SYS_SDRAM_BASE + 0x5000000)
35 #define CONFIG_SYS_LOAD_ADDR            (CONFIG_SYS_SDRAM_BASE + 0x4800000)
36
37 #define CONFIG_SYS_TEXT_BASE            0x63300000
38
39 /* select serial console configuration */
40 #define CONFIG_SERIAL2
41 #define CONFIG_BAUDRATE                 115200
42
43 /* Console configuration */
44 #define CONFIG_SYS_CONSOLE_INFO_QUIET
45 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
46
47 /* MACH_TYPE_TRATS macro will be removed once added to mach-types */
48 #define MACH_TYPE_TRATS                 3928
49 #define CONFIG_MACH_TYPE                MACH_TYPE_TRATS
50
51 #define CONFIG_BOOTARGS                 "Please use defined boot"
52 #define CONFIG_BOOTCOMMAND              "run autoboot"
53 #define CONFIG_DEFAULT_CONSOLE          "console=ttySAC2,115200n8\0"
54
55 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR \
56                                         - GENERATED_GBL_DATA_SIZE)
57
58 #define CONFIG_SYS_MEM_TOP_HIDE (1 << 20)       /* ram console */
59
60 #define CONFIG_SYS_MONITOR_BASE 0x00000000
61
62 #define CONFIG_BOOTBLOCK                "10"
63 #define CONFIG_ENV_COMMON_BOOT          "${console} ${meminfo}"
64
65 #define CONFIG_ENV_IS_IN_MMC
66 #define CONFIG_SYS_MMC_ENV_DEV          CONFIG_MMC_DEFAULT_DEV
67 #define CONFIG_ENV_SIZE                 4096
68 #define CONFIG_ENV_OFFSET               ((32 - 4) << 10) /* 32KiB - 4KiB */
69
70 #define CONFIG_ENV_OVERWRITE
71
72 #define CONFIG_ENV_VARS_UBOOT_CONFIG
73 #define CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG
74
75 /* Tizen - partitions definitions */
76 #define PARTS_CSA               "csa-mmc"
77 #define PARTS_BOOT              "boot"
78 #define PARTS_QBOOT             "qboot"
79 #define PARTS_CSC               "csc"
80 #define PARTS_ROOT              "platform"
81 #define PARTS_DATA              "data"
82 #define PARTS_UMS               "ums"
83
84 #define PARTS_DEFAULT \
85         "uuid_disk=${uuid_gpt_disk};" \
86         "name="PARTS_CSA",start=5MiB,size=8MiB,uuid=${uuid_gpt_"PARTS_CSA"};" \
87         "name="PARTS_BOOT",size=60MiB,uuid=${uuid_gpt_"PARTS_BOOT"};" \
88         "name="PARTS_QBOOT",size=100MiB,uuid=${uuid_gpt_"PARTS_QBOOT"};" \
89         "name="PARTS_CSC",size=150MiB,uuid=${uuid_gpt_"PARTS_CSC"};" \
90         "name="PARTS_ROOT",size=1536MiB,uuid=${uuid_gpt_"PARTS_ROOT"};" \
91         "name="PARTS_DATA",size=3000MiB,uuid=${uuid_gpt_"PARTS_DATA"};" \
92         "name="PARTS_UMS",size=-,uuid=${uuid_gpt_"PARTS_UMS"}\0" \
93
94 #define CONFIG_DFU_ALT \
95         "u-boot raw 0x80 0x400;" \
96         "/uImage ext4 0 2;" \
97         "/modem.bin ext4 0 2;" \
98         "/exynos4210-trats.dtb ext4 0 2;" \
99         ""PARTS_CSA" part 0 1;" \
100         ""PARTS_BOOT" part 0 2;" \
101         ""PARTS_QBOOT" part 0 3;" \
102         ""PARTS_CSC" part 0 4;" \
103         ""PARTS_ROOT" part 0 5;" \
104         ""PARTS_DATA" part 0 6;" \
105         ""PARTS_UMS" part 0 7;" \
106         "params.bin raw 0x38 0x8;" \
107         "/Image.itb ext4 0 2\0"
108
109 #define CONFIG_EXTRA_ENV_SETTINGS \
110         "bootk=" \
111                 "run loaduimage;" \
112                 "if run loaddtb; then " \
113                         "bootm 0x40007FC0 - ${fdtaddr};" \
114                 "fi;" \
115                 "bootm 0x40007FC0;\0" \
116         "updatebackup=" \
117                 "mmc dev 0 2; mmc write 0 0x42100000 0 0x200;" \
118                 "mmc dev 0 0\0" \
119         "updatebootb=" \
120                 "mmc read 0 0x42100000 0x80 0x200; run updatebackup\0" \
121         "lpj=lpj=3981312\0" \
122         "nfsboot=" \
123                 "setenv bootargs root=/dev/nfs rw " \
124                 "nfsroot=${nfsroot},nolock,tcp " \
125                 "ip=${ipaddr}:${serverip}:${gatewayip}:" \
126                 "${netmask}:generic:usb0:off " CONFIG_ENV_COMMON_BOOT \
127                 "; run bootk\0" \
128         "ramfsboot=" \
129                 "setenv bootargs root=/dev/ram0 rw rootfstype=ext2 " \
130                 "${console} ${meminfo} " \
131                 "initrd=0x43000000,8M ramdisk=8192\0" \
132         "mmcboot=" \
133                 "setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \
134                 "${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo}; " \
135                 "run bootk\0" \
136         "bootchart=setenv opts init=/sbin/bootchartd; run bootcmd\0" \
137         "boottrace=setenv opts initcall_debug; run bootcmd\0" \
138         "mmcoops=mmc read 0 0x40000000 0x40 8; md 0x40000000 0x400\0" \
139         "verify=n\0" \
140         "rootfstype=ext4\0" \
141         "console=" CONFIG_DEFAULT_CONSOLE \
142         "meminfo=crashkernel=32M@0x50000000\0" \
143         "nfsroot=/nfsroot/arm\0" \
144         "bootblock=" CONFIG_BOOTBLOCK "\0" \
145         "loaduimage=ext4load mmc ${mmcdev}:${mmcbootpart} 0x40007FC0 uImage\0" \
146         "loaddtb=ext4load mmc ${mmcdev}:${mmcbootpart} ${fdtaddr} " \
147                 "${fdtfile}\0" \
148         "mmcdev=0\0" \
149         "mmcbootpart=2\0" \
150         "mmcrootpart=5\0" \
151         "opts=always_resume=1\0" \
152         "partitions=" PARTS_DEFAULT \
153         "dfu_alt_info=" CONFIG_DFU_ALT \
154         "spladdr=0x40000100\0" \
155         "splsize=0x200\0" \
156         "splfile=falcon.bin\0" \
157         "spl_export=" \
158                    "setexpr spl_imgsize ${splsize} + 8 ;" \
159                    "setenv spl_imgsize 0x${spl_imgsize};" \
160                    "setexpr spl_imgaddr ${spladdr} - 8 ;" \
161                    "setexpr spl_addr_tmp ${spladdr} - 4 ;" \
162                    "mw.b ${spl_imgaddr} 0x00 ${spl_imgsize};run loaduimage;" \
163                    "setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \
164                    "${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo};" \
165                    "spl export atags 0x40007FC0;" \
166                    "crc32 ${spladdr} ${splsize} ${spl_imgaddr};" \
167                    "mw.l ${spl_addr_tmp} ${splsize};" \
168                    "ext4write mmc ${mmcdev}:${mmcbootpart}" \
169                    " /${splfile} ${spl_imgaddr} ${spl_imgsize};" \
170                    "setenv spl_imgsize;" \
171                    "setenv spl_imgaddr;" \
172                    "setenv spl_addr_tmp;\0" \
173         CONFIG_EXTRA_ENV_ITB \
174         "fdtaddr=40800000\0" \
175
176 /* Falcon mode definitions */
177 #define CONFIG_CMD_SPL
178 #define CONFIG_SYS_SPL_ARGS_ADDR        CONFIG_SYS_SDRAM_BASE + 0x100
179
180 /* GPT */
181 #define CONFIG_RANDOM_UUID
182
183 /* I2C */
184 #include <asm/arch/gpio.h>
185
186 #define CONFIG_SYS_I2C
187 #define CONFIG_SYS_I2C_S3C24X0
188 #define CONFIG_SYS_I2C_S3C24X0_SPEED    100000
189 #define CONFIG_SYS_I2C_S3C24X0_SLAVE    0xFE
190 #define CONFIG_MAX_I2C_NUM              8
191 #define CONFIG_SYS_I2C_SOFT             /* I2C bit-banged */
192 #define CONFIG_SYS_I2C_SOFT_SPEED       50000
193 #define CONFIG_SYS_I2C_SOFT_SLAVE       0x7F
194 #define CONFIG_SOFT_I2C_READ_REPEATED_START
195 #define CONFIG_SYS_I2C_INIT_BOARD
196
197 /* I2C FG */
198 #define CONFIG_SOFT_I2C_GPIO_SCL EXYNOS4_GPIO_Y41
199 #define CONFIG_SOFT_I2C_GPIO_SDA EXYNOS4_GPIO_Y40
200
201 /* POWER */
202 #define CONFIG_POWER
203 #define CONFIG_POWER_I2C
204 #define CONFIG_POWER_MAX8997
205
206 #define CONFIG_POWER_FG
207 #define CONFIG_POWER_FG_MAX17042
208 #define CONFIG_POWER_MUIC
209 #define CONFIG_POWER_MUIC_MAX8997
210 #define CONFIG_POWER_BATTERY
211 #define CONFIG_POWER_BATTERY_TRATS
212
213 /* Security subsystem - enable hw_rand() */
214 #define CONFIG_EXYNOS_ACE_SHA
215 #define CONFIG_LIB_HW_RAND
216
217 /* Common misc for Samsung */
218 #define CONFIG_MISC_COMMON
219
220 #define CONFIG_MISC_INIT_R
221
222 /* Download menu - Samsung common */
223 #define CONFIG_LCD_MENU
224 #define CONFIG_LCD_MENU_BOARD
225
226 /* Download menu - definitions for check keys */
227 #ifndef __ASSEMBLY__
228 #include <power/max8997_pmic.h>
229
230 #define KEY_PWR_PMIC_NAME               "MAX8997_PMIC"
231 #define KEY_PWR_STATUS_REG              MAX8997_REG_STATUS1
232 #define KEY_PWR_STATUS_MASK             (1 << 0)
233 #define KEY_PWR_INTERRUPT_REG           MAX8997_REG_INT1
234 #define KEY_PWR_INTERRUPT_MASK          (1 << 0)
235
236 #define KEY_VOL_UP_GPIO                 EXYNOS4_GPIO_X20
237 #define KEY_VOL_DOWN_GPIO               EXYNOS4_GPIO_X21
238 #endif /* __ASSEMBLY__ */
239
240 /* LCD console */
241 #define LCD_BPP                 LCD_COLOR16
242 #define CONFIG_SYS_WHITE_ON_BLACK
243
244 /* LCD */
245 #define CONFIG_EXYNOS_FB
246 #define CONFIG_LCD
247 #define CONFIG_CMD_BMP
248 #define CONFIG_BMP_16BPP
249 #define CONFIG_FB_ADDR          0x52504000
250 #define CONFIG_S6E8AX0
251 #define CONFIG_EXYNOS_MIPI_DSIM
252 #define CONFIG_VIDEO_BMP_GZIP
253 #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE  ((500 * 160 * 4) + 54)
254
255 #endif  /* __CONFIG_H */