usb: ums: move ums code from trats to Samsung common directory
[platform/kernel/u-boot.git] / include / configs / trats.h
1 /*
2  * Copyright (C) 2011 Samsung Electronics
3  * Heungjun Kim <riverful.kim@samsung.com>
4  *
5  * Configuation settings for the SAMSUNG TRATS (EXYNOS4210) board.
6  *
7  * SPDX-License-Identifier:     GPL-2.0+
8  */
9
10 #ifndef __CONFIG_H
11 #define __CONFIG_H
12
13 /*
14  * High Level Configuration Options
15  * (easy to change)
16  */
17 #define CONFIG_SAMSUNG          /* in a SAMSUNG core */
18 #define CONFIG_S5P              /* which is in a S5P Family */
19 #define CONFIG_EXYNOS4210       /* which is in a EXYNOS4210 */
20 #define CONFIG_TRATS            /* working with TRATS */
21 #define CONFIG_TIZEN            /* TIZEN lib */
22
23 #include <asm/arch/cpu.h>       /* get chip and board defs */
24
25 #define CONFIG_ARCH_CPU_INIT
26 #define CONFIG_DISPLAY_CPUINFO
27 #define CONFIG_DISPLAY_BOARDINFO
28
29 #ifndef CONFIG_SYS_L2CACHE_OFF
30 #define CONFIG_SYS_L2_PL310
31 #define CONFIG_SYS_PL310_BASE   0x10502000
32 #endif
33
34 #define CONFIG_SYS_SDRAM_BASE           0x40000000
35 #define CONFIG_SYS_TEXT_BASE            0x63300000
36
37 /* input clock of PLL: TRATS has 24MHz input clock at EXYNOS4210 */
38 #define CONFIG_SYS_CLK_FREQ_C210        24000000
39 #define CONFIG_SYS_CLK_FREQ             CONFIG_SYS_CLK_FREQ_C210
40
41 #define CONFIG_SETUP_MEMORY_TAGS
42 #define CONFIG_CMDLINE_TAG
43 #define CONFIG_REVISION_TAG
44 #define CONFIG_CMDLINE_EDITING
45 #define CONFIG_SKIP_LOWLEVEL_INIT
46 #define CONFIG_BOARD_EARLY_INIT_F
47
48 /* MACH_TYPE_TRATS macro will be removed once added to mach-types */
49 #define MACH_TYPE_TRATS                 3928
50 #define CONFIG_MACH_TYPE                MACH_TYPE_TRATS
51
52 #include <asm/sizes.h>
53 /* Size of malloc() pool */
54 #define CONFIG_SYS_MALLOC_LEN           (CONFIG_ENV_SIZE + (80 * SZ_1M))
55
56 /* select serial console configuration */
57 #define CONFIG_SERIAL2                  /* use SERIAL 2 */
58 #define CONFIG_BAUDRATE                 115200
59
60 /* MMC */
61 #define CONFIG_GENERIC_MMC
62 #define CONFIG_MMC
63 #define CONFIG_S5P_SDHCI
64 #define CONFIG_SDHCI
65 #define CONFIG_MMC_SDMA
66
67 /* PWM */
68 #define CONFIG_PWM
69
70 /* It should define before config_cmd_default.h */
71 #define CONFIG_SYS_NO_FLASH
72
73 /* Command definition */
74 #include <config_cmd_default.h>
75
76 #undef CONFIG_CMD_FPGA
77 #undef CONFIG_CMD_MISC
78 #undef CONFIG_CMD_NET
79 #undef CONFIG_CMD_NFS
80 #undef CONFIG_CMD_XIMG
81 #undef CONFIG_CMD_CACHE
82 #undef CONFIG_CMD_ONENAND
83 #undef CONFIG_CMD_MTDPARTS
84 #define CONFIG_CMD_MMC
85 #define CONFIG_CMD_DFU
86 #define CONFIG_CMD_GPT
87 #define CONFIG_CMD_SETEXPR
88
89 /* FAT */
90 #define CONFIG_CMD_FAT
91 #define CONFIG_FAT_WRITE
92
93 /* USB Composite download gadget - g_dnl */
94 #define CONFIG_USBDOWNLOAD_GADGET
95
96 /* TIZEN THOR downloader support */
97 #define CONFIG_CMD_THOR_DOWNLOAD
98 #define CONFIG_THOR_FUNCTION
99
100 #define CONFIG_SYS_DFU_DATA_BUF_SIZE SZ_32M
101 #define CONFIG_DFU_FUNCTION
102 #define CONFIG_DFU_MMC
103
104 /* USB Samsung's IDs */
105 #define CONFIG_G_DNL_VENDOR_NUM 0x04E8
106 #define CONFIG_G_DNL_PRODUCT_NUM 0x6601
107 #define CONFIG_G_DNL_THOR_VENDOR_NUM CONFIG_G_DNL_VENDOR_NUM
108 #define CONFIG_G_DNL_THOR_PRODUCT_NUM 0x685D
109 #define CONFIG_G_DNL_MANUFACTURER "Samsung"
110
111 #define CONFIG_BOOTDELAY                1
112 #define CONFIG_ZERO_BOOTDELAY_CHECK
113 #define CONFIG_BOOTARGS                 "Please use defined boot"
114 #define CONFIG_BOOTCOMMAND              "run mmcboot"
115
116 #define CONFIG_DEFAULT_CONSOLE          "console=ttySAC2,115200n8\0"
117 #define CONFIG_BOOTBLOCK                "10"
118 #define CONFIG_ENV_COMMON_BOOT          "${console} ${meminfo}"
119
120 /* Tizen - partitions definitions */
121 #define PARTS_CSA               "csa-mmc"
122 #define PARTS_BOOTLOADER        "u-boot"
123 #define PARTS_BOOT              "boot"
124 #define PARTS_ROOT              "platform"
125 #define PARTS_DATA              "data"
126 #define PARTS_CSC               "csc"
127 #define PARTS_UMS               "ums"
128
129 #define PARTS_DEFAULT \
130         "uuid_disk=${uuid_gpt_disk};" \
131         "name="PARTS_CSA",size=8MiB,uuid=${uuid_gpt_"PARTS_CSA"};" \
132         "name="PARTS_BOOTLOADER",size=60MiB," \
133                 "uuid=${uuid_gpt_"PARTS_BOOTLOADER"};" \
134         "name="PARTS_BOOT",size=100MiB,uuid=${uuid_gpt_"PARTS_BOOT"};" \
135         "name="PARTS_ROOT",size=1GiB,uuid=${uuid_gpt_"PARTS_ROOT"};" \
136         "name="PARTS_DATA",size=3GiB,uuid=${uuid_gpt_"PARTS_DATA"};" \
137         "name="PARTS_CSC",size=150MiB,uuid=${uuid_gpt_"PARTS_CSC"};" \
138         "name="PARTS_UMS",size=-,uuid=${uuid_gpt_"PARTS_UMS"}\0" \
139
140 #define CONFIG_DFU_ALT \
141         "u-boot mmc 80 400;" \
142         "uImage ext4 0 2;" \
143         "exynos4210-trats.dtb ext4 0 2;" \
144         ""PARTS_ROOT" part 0 5\0"
145
146 #define CONFIG_ENV_OVERWRITE
147 #define CONFIG_SYS_CONSOLE_INFO_QUIET
148 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
149
150 #define CONFIG_EXTRA_ENV_SETTINGS \
151         "bootk=" \
152                 "run loaddtb; run loaduimage; bootm 0x40007FC0 - ${fdtaddr}\0" \
153         "updatemmc=" \
154                 "mmc boot 0 1 1 1; mmc write 0 0x42008000 0 0x200;" \
155                 "mmc boot 0 1 1 0\0" \
156         "updatebackup=" \
157                 "mmc boot 0 1 1 2; mmc write 0 0x42100000 0 0x200;" \
158                 "mmc boot 0 1 1 0\0" \
159         "updatebootb=" \
160                 "mmc read 0 0x42100000 0x80 0x200; run updatebackup\0" \
161         "lpj=lpj=3981312\0" \
162         "nfsboot=" \
163                 "setenv bootargs root=/dev/nfs rw " \
164                 "nfsroot=${nfsroot},nolock,tcp " \
165                 "ip=${ipaddr}:${serverip}:${gatewayip}:" \
166                 "${netmask}:generic:usb0:off " CONFIG_ENV_COMMON_BOOT \
167                 "; run bootk\0" \
168         "ramfsboot=" \
169                 "setenv bootargs root=/dev/ram0 rw rootfstype=ext2 " \
170                 "${console} ${meminfo} " \
171                 "initrd=0x43000000,8M ramdisk=8192\0" \
172         "mmcboot=" \
173                 "setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \
174                 "${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo}; " \
175                 "run loaddtb; run loaduimage; bootm 0x40007FC0 - ${fdtaddr}\0" \
176         "bootchart=setenv opts init=/sbin/bootchartd; run bootcmd\0" \
177         "boottrace=setenv opts initcall_debug; run bootcmd\0" \
178         "mmcoops=mmc read 0 0x40000000 0x40 8; md 0x40000000 0x400\0" \
179         "verify=n\0" \
180         "rootfstype=ext4\0" \
181         "console=" CONFIG_DEFAULT_CONSOLE \
182         "meminfo=crashkernel=32M@0x50000000\0" \
183         "nfsroot=/nfsroot/arm\0" \
184         "bootblock=" CONFIG_BOOTBLOCK "\0" \
185         "loaduimage=ext4load mmc ${mmcdev}:${mmcbootpart} 0x40007FC0 uImage\0" \
186         "loaddtb=ext4load mmc ${mmcdev}:${mmcbootpart} ${fdtaddr} " \
187                 "${fdtfile}\0" \
188         "mmcdev=0\0" \
189         "mmcbootpart=2\0" \
190         "mmcrootpart=5\0" \
191         "opts=always_resume=1\0" \
192         "partitions=" PARTS_DEFAULT \
193         "dfu_alt_info=" CONFIG_DFU_ALT \
194         "spladdr=0x40000100\0" \
195         "splsize=0x200\0" \
196         "splfile=falcon.bin\0" \
197         "spl_export=" \
198                    "setexpr spl_imgsize ${splsize} + 8 ;" \
199                    "setenv spl_imgsize 0x${spl_imgsize};" \
200                    "setexpr spl_imgaddr ${spladdr} - 8 ;" \
201                    "setexpr spl_addr_tmp ${spladdr} - 4 ;" \
202                    "mw.b ${spl_imgaddr} 0x00 ${spl_imgsize};run loaduimage;" \
203                    "setenv bootargs root=/dev/mmcblk${mmcdev}p${mmcrootpart} " \
204                    "${lpj} rootwait ${console} ${meminfo} ${opts} ${lcdinfo};" \
205                    "spl export atags 0x40007FC0;" \
206                    "crc32 ${spladdr} ${splsize} ${spl_imgaddr};" \
207                    "mw.l ${spl_addr_tmp} ${splsize};" \
208                    "ext4write mmc ${mmcdev}:${mmcbootpart}" \
209                    " /${splfile} ${spl_imgaddr} ${spl_imgsize};" \
210                    "setenv spl_imgsize;" \
211                    "setenv spl_imgaddr;" \
212                    "setenv spl_addr_tmp;\0" \
213         "fdtaddr=40800000\0" \
214         "fdtfile=exynos4210-trats.dtb\0"
215
216
217 /* Miscellaneous configurable options */
218 #define CONFIG_SYS_LONGHELP             /* undef to save memory */
219 #define CONFIG_SYS_HUSH_PARSER          /* use "hush" command parser */
220 #define CONFIG_SYS_PROMPT               "TRATS # "
221 #define CONFIG_SYS_CBSIZE               256     /* Console I/O Buffer Size */
222 #define CONFIG_SYS_PBSIZE               384     /* Print Buffer Size */
223 #define CONFIG_SYS_MAXARGS              16      /* max number of command args */
224 /* Boot Argument Buffer Size */
225 #define CONFIG_SYS_BARGSIZE             CONFIG_SYS_CBSIZE
226 /* memtest works on */
227 #define CONFIG_SYS_MEMTEST_START        CONFIG_SYS_SDRAM_BASE
228 #define CONFIG_SYS_MEMTEST_END          (CONFIG_SYS_SDRAM_BASE + 0x5000000)
229 #define CONFIG_SYS_LOAD_ADDR            (CONFIG_SYS_SDRAM_BASE + 0x4800000)
230
231 /* TRATS has 4 banks of DRAM */
232 #define CONFIG_NR_DRAM_BANKS    4
233 #define SDRAM_BANK_SIZE         (256UL << 20UL) /* 256 MB */
234 #define PHYS_SDRAM_1            CONFIG_SYS_SDRAM_BASE
235 #define PHYS_SDRAM_1_SIZE       SDRAM_BANK_SIZE
236 #define PHYS_SDRAM_2            (CONFIG_SYS_SDRAM_BASE + SDRAM_BANK_SIZE)
237 #define PHYS_SDRAM_2_SIZE       SDRAM_BANK_SIZE
238 #define PHYS_SDRAM_3            (CONFIG_SYS_SDRAM_BASE + (2 * SDRAM_BANK_SIZE))
239 #define PHYS_SDRAM_3_SIZE       SDRAM_BANK_SIZE
240 #define PHYS_SDRAM_4            (CONFIG_SYS_SDRAM_BASE + (3 * SDRAM_BANK_SIZE))
241 #define PHYS_SDRAM_4_SIZE       SDRAM_BANK_SIZE
242
243 #define CONFIG_SYS_MEM_TOP_HIDE         (1 << 20)       /* ram console */
244
245 #define CONFIG_SYS_MONITOR_BASE         0x00000000
246 #define CONFIG_SYS_MONITOR_LEN          (256 << 10)     /* Reserve 2 sectors */
247
248 #define CONFIG_ENV_IS_IN_MMC
249 #define CONFIG_SYS_MMC_ENV_DEV          0
250 #define CONFIG_ENV_SIZE                 4096
251 #define CONFIG_ENV_OFFSET               ((32 - 4) << 10) /* 32KiB - 4KiB */
252
253 #define CONFIG_DOS_PARTITION
254 #define CONFIG_EFI_PARTITION
255
256 /* EXT4 */
257 #define CONFIG_CMD_EXT4
258 #define CONFIG_CMD_EXT4_WRITE
259 /* Falcon mode definitions */
260 #define CONFIG_CMD_SPL
261 #define CONFIG_SYS_SPL_ARGS_ADDR        PHYS_SDRAM_1 + 0x100
262
263 /* GPT */
264 #define CONFIG_EFI_PARTITION
265 #define CONFIG_PARTITION_UUIDS
266
267 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_LOAD_ADDR - GENERATED_GBL_DATA_SIZE)
268 #define CONFIG_SYS_CACHELINE_SIZE       32
269
270 #define CONFIG_SYS_I2C
271 #define CONFIG_SYS_I2C_SOFT             /* I2C bit-banged */
272 #define CONFIG_SYS_I2C_SOFT_SPEED       50000
273 #define CONFIG_SYS_I2C_SOFT_SLAVE       0xFE
274 #define I2C_SOFT_DECLARATIONS2
275 #define CONFIG_SYS_I2C_SOFT_SPEED_2     50000
276 #define CONFIG_SYS_I2C_SOFT_SLAVE_2     0x7F
277 #define CONFIG_SOFT_I2C_READ_REPEATED_START
278 #define CONFIG_SYS_I2C_INIT_BOARD
279 #define CONFIG_I2C_MULTI_BUS
280 #define CONFIG_SOFT_I2C_MULTI_BUS
281 #define CONFIG_SYS_MAX_I2C_BUS  15
282
283 #include <asm/arch/gpio.h>
284
285 /* I2C PMIC */
286 #define CONFIG_SOFT_I2C_I2C5_SCL exynos4_gpio_part1_get_nr(b, 7)
287 #define CONFIG_SOFT_I2C_I2C5_SDA exynos4_gpio_part1_get_nr(b, 6)
288
289 /* I2C FG */
290 #define CONFIG_SOFT_I2C_I2C9_SCL exynos4_gpio_part2_get_nr(y4, 1)
291 #define CONFIG_SOFT_I2C_I2C9_SDA exynos4_gpio_part2_get_nr(y4, 0)
292
293 #define CONFIG_SOFT_I2C_GPIO_SCL get_multi_scl_pin()
294 #define CONFIG_SOFT_I2C_GPIO_SDA get_multi_sda_pin()
295 #define I2C_INIT multi_i2c_init()
296
297 #define CONFIG_POWER
298 #define CONFIG_POWER_I2C
299 #define CONFIG_POWER_MAX8997
300
301 #define CONFIG_POWER_FG
302 #define CONFIG_POWER_FG_MAX17042
303 #define CONFIG_POWER_MUIC
304 #define CONFIG_POWER_MUIC_MAX8997
305 #define CONFIG_POWER_BATTERY
306 #define CONFIG_POWER_BATTERY_TRATS
307 #define CONFIG_USB_GADGET
308 #define CONFIG_USB_GADGET_S3C_UDC_OTG
309 #define CONFIG_USB_GADGET_DUALSPEED
310 #define CONFIG_USB_GADGET_VBUS_DRAW     2
311
312 /* LCD */
313 #define CONFIG_EXYNOS_FB
314 #define CONFIG_LCD
315 #define CONFIG_CMD_BMP
316 #define CONFIG_BMP_32BPP
317 #define CONFIG_FB_ADDR          0x52504000
318 #define CONFIG_S6E8AX0
319 #define CONFIG_EXYNOS_MIPI_DSIM
320 #define CONFIG_VIDEO_BMP_GZIP
321 #define CONFIG_SYS_VIDEO_LOGO_MAX_SIZE ((500 * 120 * 4) + (1 << 12))
322
323 #define CONFIG_CMD_USB_MASS_STORAGE
324 #define CONFIG_USB_GADGET_MASS_STORAGE
325
326 /* Pass open firmware flat tree */
327 #define CONFIG_OF_LIBFDT    1
328
329 #endif  /* __CONFIG_H */