2 * (C) Copyright 2002-2005
3 * Gary Jennejohn <gj@denx.de>
5 * Configuation settings for the TRAB board.
7 * See file CREDITS for list of people who contributed to this
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
30 * Default configuration is with 8 MB Flash, 32 MB RAM
32 #if (!defined(CONFIG_FLASH_8MB)) && (!defined(CONFIG_FLASH_16MB))
33 # define CONFIG_FLASH_8MB /* 8 MB Flash */
35 #if (!defined(CONFIG_RAM_16MB)) && (!defined(CONFIG_RAM_32MB))
36 # define CONFIG_RAM_32MB /* 32 MB SDRAM */
40 * High Level Configuration Options
43 #define CONFIG_ARM920T 1 /* This is an arm920t CPU */
44 #define CONFIG_S3C2400 1 /* in a SAMSUNG S3C2400 SoC */
45 #define CONFIG_TRAB 1 /* on a TRAB Board */
46 #undef CONFIG_TRAB_50MHZ /* run the CPU at 50 MHz */
47 #define LITTLEENDIAN 1 /* used by usb_ohci.c */
49 /* automatic software updates (see board/trab/auto_update.c) */
50 #define CONFIG_AUTO_UPDATE 1
52 /* input clock of PLL */
53 #define CONFIG_SYS_CLK_FREQ 12000000 /* TRAB has 12 MHz input clock */
55 #undef CONFIG_USE_IRQ /* we don't need IRQ/FIQ stuff */
57 #define CONFIG_CMDLINE_TAG 1 /* enable passing of ATAGs */
58 #define CONFIG_SETUP_MEMORY_TAGS 1
59 #define CONFIG_INITRD_TAG 1
61 #define CFG_DEVICE_NULLDEV 1 /* enble null device */
62 #define CONFIG_SILENT_CONSOLE 1 /* enable silent startup */
64 #define CONFIG_VERSION_VARIABLE 1 /* include version env variable */
66 /***********************************************************
68 * the TRAB is equipped with an ATMEL 24C04 EEPROM at
69 * address 0x54 with 8bit addressing
70 ***********************************************************/
71 #define CONFIG_HARD_I2C /* I2C with hardware support */
72 #define CFG_I2C_SPEED 100000 /* I2C speed */
73 #define CFG_I2C_SLAVE 0x7F /* I2C slave addr */
75 #define CFG_I2C_EEPROM_ADDR 0x54 /* EEPROM address */
76 #define CFG_I2C_EEPROM_ADDR_LEN 1 /* 1 address byte */
78 #define CFG_I2C_EEPROM_ADDR_OVERFLOW 0x01
79 #define CFG_EEPROM_PAGE_WRITE_BITS 3 /* 8 bytes page write mode on 24C04 */
80 #define CFG_EEPROM_PAGE_WRITE_DELAY_MS 10
83 #define CONFIG_USB_OHCI_NEW 1
84 #define CONFIG_USB_STORAGE 1
85 #define CONFIG_DOS_PARTITION 1
87 #undef CFG_USB_OHCI_BOARD_INIT
88 #define CFG_USB_OHCI_CPU_INIT 1
89 #define CFG_USB_OHCI_REGS_BASE S3C24X0_USB_HOST_BASE
90 #define CFG_USB_OHCI_SLOT_NAME "s3c2400"
91 #define CFG_USB_OHCI_MAX_ROOT_PORTS 15
94 * Size of malloc() pool
96 #define CFG_MALLOC_LEN (CFG_ENV_SIZE + 128*1024)
97 #define CFG_GBL_DATA_SIZE 128 /* size in bytes reserved for initial data */
102 #define CONFIG_DRIVER_CS8900 1 /* we have a CS8900 on-board */
103 #define CS8900_BASE 0x07000300 /* agrees with WIN CE PA */
104 #define CS8900_BUS16 1 /* the Linux driver does accesses as shorts */
106 #define CONFIG_DRIVER_S3C24X0_I2C 1 /* we use the buildin I2C controller */
108 #define CONFIG_VFD 1 /* VFD linear frame buffer driver */
109 #define VFD_TEST_LOGO 1 /* output a test logo to the VFDs */
112 * select serial console configuration
114 #define CONFIG_SERIAL1 1 /* we use SERIAL 1 on TRAB */
116 #define CONFIG_HWFLOW /* include RTS/CTS flow control support */
118 #define CONFIG_MODEM_SUPPORT 1 /* enable modem initialization stuff */
120 #define CONFIG_MODEM_KEY_MAGIC "23" /* hold down these keys to enable modem */
123 * The following enables modem debugging stuff. The dbg() and
124 * 'char screen[1024]' are used for debug printfs. Unfortunately,
125 * it is usable only from BDI
127 #undef CONFIG_MODEM_SUPPORT_DEBUG
129 /* allow to overwrite serial and ethaddr */
130 #define CONFIG_ENV_OVERWRITE
132 #define CONFIG_BAUDRATE 115200
134 #define CONFIG_TIMESTAMP 1 /* Print timestamp info for images */
136 /* Use s3c2400's RTC */
137 #define CONFIG_RTC_S3C24X0 1
140 #define CONFIG_COMMANDS_ADD_HWFLOW CFG_CMD_HWFLOW
142 #define CONFIG_COMMANDS_ADD_HWFLOW 0
146 #define CONFIG_COMMANDS_ADD_VFD CFG_CMD_VFD
148 #define CONFIG_COMMANDS_ADD_VFD 0
151 #ifdef CONFIG_DRIVER_S3C24X0_I2C
152 #define CONFIG_COMMANDS_ADD_EEPROM CFG_CMD_EEPROM
153 #define CONFIG_COMMANDS_I2C CFG_CMD_I2C
155 #define CONFIG_COMMANDS_ADD_EEPROM 0
156 #define CONFIG_COMMANDS_I2C 0
160 #define CONFIG_COMMANDS ((CONFIG_CMD_DFL & ~CFG_CMD_CACHE) | \
161 CONFIG_COMMANDS_ADD_HWFLOW | \
162 CONFIG_COMMANDS_ADD_VFD | \
163 CONFIG_COMMANDS_ADD_EEPROM | \
164 CONFIG_COMMANDS_I2C | \
173 #define CONFIG_COMMANDS (CONFIG_CMD_DFL | \
174 CONFIG_COMMANDS_ADD_HWFLOW | \
175 CONFIG_COMMANDS_ADD_VFD | \
176 CONFIG_COMMANDS_ADD_EEPROM | \
177 CONFIG_COMMANDS_I2C | \
188 #define CFG_HUSH_PARSER 1 /* use "hush" command parser */
190 /* this must be included AFTER the definition of CONFIG_COMMANDS (if any) */
191 #include <cmd_confdefs.h>
193 #define CONFIG_BOOTDELAY 5
194 #define CONFIG_ZERO_BOOTDELAY_CHECK /* allow to break in always */
195 #define CONFIG_PREBOOT "echo;echo *** booting ***;echo"
196 #define CONFIG_BOOTARGS "console=ttyS0"
197 #define CONFIG_NETMASK 255.255.0.0
198 #define CONFIG_IPADDR 192.168.3.68
199 #define CONFIG_HOSTNAME trab
200 #define CONFIG_SERVERIP 192.168.3.1
201 #define CONFIG_BOOTCOMMAND "burn_in"
203 #ifndef CONFIG_FLASH_8MB /* current config: 16 MB flash */
204 #ifdef CFG_HUSH_PARSER
205 #define CONFIG_EXTRA_ENV_SETTINGS \
206 "nfs_args=setenv bootargs root=/dev/nfs rw " \
207 "nfsroot=$serverip:$rootpath\0" \
208 "rootpath=/opt/eldk/arm_920TDI\0" \
209 "ram_args=setenv bootargs root=/dev/ram rw\0" \
210 "add_net=setenv bootargs $bootargs ethaddr=$ethaddr " \
211 "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname::off\0" \
212 "add_misc=setenv bootargs $bootargs console=ttyS0 panic=1\0" \
213 "u-boot=/tftpboot/TRAB/u-boot.bin\0" \
214 "load=tftp C100000 ${u-boot}\0" \
215 "update=protect off 0 5FFFF;era 0 5FFFF;" \
216 "cp.b C100000 0 $filesize\0" \
217 "loadfile=/tftpboot/TRAB/uImage\0" \
218 "loadaddr=c400000\0" \
219 "net_load=tftpboot $loadaddr $loadfile\0" \
220 "net_nfs=run net_load nfs_args add_net add_misc;bootm\0" \
221 "kernel_addr=00060000\0" \
222 "flash_nfs=run nfs_args add_net add_misc;bootm $kernel_addr\0" \
224 "mdm_init2=ATS0=1\0" \
225 "mdm_flow_control=rts/cts\0"
226 #else /* !CFG_HUSH_PARSER */
227 #define CONFIG_EXTRA_ENV_SETTINGS \
228 "nfs_args=setenv bootargs root=/dev/nfs rw " \
229 "nfsroot=${serverip}:${rootpath}\0" \
230 "rootpath=/opt/eldk/arm_920TDI\0" \
231 "ram_args=setenv bootargs root=/dev/ram rw\0" \
232 "add_net=setenv bootargs ${bootargs} ethaddr=${ethaddr} " \
233 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}::off\0" \
234 "add_misc=setenv bootargs ${bootargs} console=ttyS0 panic=1\0" \
235 "u-boot=/tftpboot/TRAB/u-boot.bin\0" \
236 "load=tftp C100000 ${u-boot}\0" \
237 "update=protect off 0 5FFFF;era 0 5FFFF;" \
238 "cp.b C100000 0 ${filesize}\0" \
239 "loadfile=/tftpboot/TRAB/uImage\0" \
240 "loadaddr=c400000\0" \
241 "net_load=tftpboot ${loadaddr} ${loadfile}\0" \
242 "net_nfs=run net_load nfs_args add_net add_misc;bootm\0" \
243 "kernel_addr=000C0000\0" \
244 "flash_nfs=run nfs_args add_net add_misc;bootm ${kernel_addr}\0" \
246 "mdm_init2=ATS0=1\0" \
247 "mdm_flow_control=rts/cts\0"
248 #endif /* CFG_HUSH_PARSER */
249 #else /* CONFIG_FLASH_8MB => 8 MB flash */
250 #ifdef CFG_HUSH_PARSER
251 #define CONFIG_EXTRA_ENV_SETTINGS \
252 "nfs_args=setenv bootargs root=/dev/nfs rw " \
253 "nfsroot=$serverip:$rootpath\0" \
254 "rootpath=/opt/eldk/arm_920TDI\0" \
255 "ram_args=setenv bootargs root=/dev/ram rw\0" \
256 "add_net=setenv bootargs $bootargs ethaddr=$ethaddr " \
257 "ip=$ipaddr:$serverip:$gatewayip:$netmask:$hostname::off\0" \
258 "add_misc=setenv bootargs $bootargs console=ttyS0 panic=1\0" \
259 "u-boot=/tftpboot/TRAB/u-boot.bin\0" \
260 "load=tftp C100000 ${u-boot}\0" \
261 "update=protect off 0 3FFFF;era 0 3FFFF;" \
262 "cp.b C100000 0 $filesize;" \
263 "setenv filesize;saveenv\0" \
264 "loadfile=/tftpboot/TRAB/uImage\0" \
265 "loadaddr=C400000\0" \
266 "net_load=tftpboot $loadaddr $loadfile\0" \
267 "net_nfs=run net_load nfs_args add_net add_misc;bootm\0" \
268 "kernel_addr=000C0000\0" \
269 "flash_nfs=run nfs_args add_net add_misc;bootm $kernel_addr\0" \
271 "mdm_init2=ATS0=1\0" \
272 "mdm_flow_control=rts/cts\0"
273 #else /* !CFG_HUSH_PARSER */
274 #define CONFIG_EXTRA_ENV_SETTINGS \
275 "nfs_args=setenv bootargs root=/dev/nfs rw " \
276 "nfsroot=${serverip}:${rootpath}\0" \
277 "rootpath=/opt/eldk/arm_920TDI\0" \
278 "ram_args=setenv bootargs root=/dev/ram rw\0" \
279 "add_net=setenv bootargs ${bootargs} ethaddr=${ethaddr} " \
280 "ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}::off\0" \
281 "add_misc=setenv bootargs ${bootargs} console=ttyS0 panic=1\0" \
282 "u-boot=/tftpboot/TRAB/u-boot.bin\0" \
283 "load=tftp C100000 ${u-boot}\0" \
284 "update=protect off 0 3FFFF;era 0 3FFFF;" \
285 "cp.b C100000 0 ${filesize};" \
286 "setenv filesize;saveenv\0" \
287 "loadfile=/tftpboot/TRAB/uImage\0" \
288 "loadaddr=C400000\0" \
289 "net_load=tftpboot ${loadaddr} ${loadfile}\0" \
290 "net_nfs=run net_load nfs_args add_net add_misc;bootm\0" \
291 "kernel_addr=000C0000\0" \
292 "flash_nfs=run nfs_args add_net add_misc;bootm ${kernel_addr}\0" \
294 "mdm_init2=ATS0=1\0" \
295 "mdm_flow_control=rts/cts\0"
296 #endif /* CFG_HUSH_PARSER */
297 #endif /* CONFIG_FLASH_8MB */
299 #if 1 /* feel free to disable for development */
300 #define CONFIG_AUTOBOOT_KEYED /* Enable password protection */
301 #define CONFIG_AUTOBOOT_PROMPT "\nEnter password - autoboot in %d sec...\n"
302 #define CONFIG_AUTOBOOT_DELAY_STR "R" /* 1st "password" */
305 #if (CONFIG_COMMANDS & CFG_CMD_KGDB)
306 #define CONFIG_KGDB_BAUDRATE 115200 /* speed to run kgdb serial port */
307 /* what's this ? it's not used anywhere */
308 #define CONFIG_KGDB_SER_INDEX 1 /* which serial port to use */
312 * Miscellaneous configurable options
314 #define CFG_LONGHELP /* undef to save memory */
315 #define CFG_PROMPT "TRAB # " /* Monitor Command Prompt */
316 #ifdef CFG_HUSH_PARSER
317 #define CFG_PROMPT_HUSH_PS2 "> "
320 #define CFG_CBSIZE 256 /* Console I/O Buffer Size */
321 #define CFG_PBSIZE (CFG_CBSIZE+sizeof(CFG_PROMPT)+16) /* Print Buffer Size */
322 #define CFG_MAXARGS 16 /* max number of command args */
323 #define CFG_BARGSIZE CFG_CBSIZE /* Boot Argument Buffer Size */
325 #define CFG_MEMTEST_START 0x0C000000 /* memtest works on */
326 #define CFG_MEMTEST_END 0x0D000000 /* 16 MB in DRAM */
328 #undef CFG_CLKS_IN_HZ /* everything, incl board info, in Hz */
330 #define CFG_LOAD_ADDR 0x0CF00000 /* default load address */
332 #ifdef CONFIG_TRAB_50MHZ
333 /* the PWM TImer 4 uses a counter of 15625 for 10 ms, so we need */
334 /* it to wrap 100 times (total 1562500) to get 1 sec. */
335 /* this should _really_ be calculated !! */
336 #define CFG_HZ 1562500
338 /* the PWM TImer 4 uses a counter of 10390 for 10 ms, so we need */
339 /* it to wrap 100 times (total 1039000) to get 1 sec. */
340 /* this should _really_ be calculated !! */
341 #define CFG_HZ 1039000
344 /* valid baudrates */
345 #define CFG_BAUDRATE_TABLE { 9600, 19200, 38400, 57600, 115200 }
347 #define CONFIG_MISC_INIT_R /* have misc_init_r() function */
349 /*-----------------------------------------------------------------------
350 * burn-in test stuff.
352 * BURN_IN_CYCLE_DELAY defines the seconds to wait between each burn-in cycle
353 * Because the burn-in test itself causes also an delay of about 4 seconds,
354 * this time must be subtracted from the desired overall burn-in cycle time.
356 #define BURN_IN_CYCLE_DELAY 296 /* seconds between burn-in cycles */
358 /*-----------------------------------------------------------------------
361 * The stack sizes are set up in start.S using the settings below
363 #define CONFIG_STACKSIZE (128*1024) /* regular stack */
364 #ifdef CONFIG_USE_IRQ
365 #define CONFIG_STACKSIZE_IRQ (4*1024) /* IRQ stack */
366 #define CONFIG_STACKSIZE_FIQ (4*1024) /* FIQ stack */
369 /*-----------------------------------------------------------------------
370 * Physical Memory Map
372 #define CONFIG_NR_DRAM_BANKS 1 /* we have 1 bank of DRAM */
373 #define PHYS_SDRAM_1 0x0C000000 /* SDRAM Bank #1 */
374 #ifndef CONFIG_RAM_16MB
375 #define PHYS_SDRAM_1_SIZE 0x02000000 /* 32 MB */
377 #define PHYS_SDRAM_1_SIZE 0x01000000 /* 16 MB */
380 #define CFG_FLASH_BASE 0x00000000 /* Flash Bank #1 */
382 /* The following #defines are needed to get flash environment right */
383 #define CFG_MONITOR_BASE CFG_FLASH_BASE
384 #define CFG_MONITOR_LEN (256 << 10)
386 /* Dynamic MTD partition support */
387 #define CONFIG_JFFS2_CMDLINE
388 #define MTDIDS_DEFAULT "nor0=0"
390 /* production flash layout */
391 #define MTDPARTS_DEFAULT "mtdparts=0:16k(Firmware1)ro," \
394 "336k(Firmware2)ro," \
400 /*-----------------------------------------------------------------------
401 * FLASH and environment organization
403 #define CFG_MAX_FLASH_BANKS 1 /* max number of memory banks */
404 #ifndef CONFIG_FLASH_8MB
405 #define CFG_MAX_FLASH_SECT 128 /* max number of sectors on one chip */
407 #define CFG_MAX_FLASH_SECT 71 /* max number of sectors on one chip */
410 /* timeout values are in ticks */
411 #define CFG_FLASH_ERASE_TOUT (15*CFG_HZ) /* Timeout for Flash Erase */
412 #define CFG_FLASH_WRITE_TOUT (2*CFG_HZ) /* Timeout for Flash Write */
414 #define CFG_ENV_IS_IN_FLASH 1
416 /* Address and size of Primary Environment Sector */
417 #ifndef CONFIG_FLASH_8MB
418 #define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x60000)
419 #define CFG_ENV_SIZE 0x4000
420 #define CFG_ENV_SECT_SIZE 0x20000
422 #define CFG_ENV_ADDR (CFG_FLASH_BASE + 0x4000)
423 #define CFG_ENV_SIZE 0x4000
424 #define CFG_ENV_SECT_SIZE 0x4000
427 /* Address and size of Redundant Environment Sector */
428 #define CFG_ENV_OFFSET_REDUND (CFG_ENV_ADDR+CFG_ENV_SECT_SIZE)
429 #define CFG_ENV_SIZE_REDUND (CFG_ENV_SIZE)
431 /* Initial value of the on-board touch screen brightness */
432 #define CFG_BRIGHTNESS 0x20
434 #endif /* __CONFIG_H */