2 * (C) Copyright 2007-2008
3 * Stelian Pop <stelian@popies.net>
4 * Lead Tech Design <www.leadtechdesign.com>
7 * Albin Tonnerre, Free Electrons <albin.tonnerre@free-electrons.com>
9 * Configuation settings for the Calao TNY-A9260 and TNY-A9G20 boards
11 * SPDX-License-Identifier: GPL-2.0+
18 * SoC must be defined first, before hardware.h is included.
19 * In this case SoC is defined in boards.cfg.
21 #include <asm/hardware.h>
23 #if defined(CONFIG_TNY_A9260_NANDFLASH) || defined(CONFIG_TNY_A9G20_NANDFLASH)
24 #define CONFIG_ENV_IS_IN_NAND
26 #define CONFIG_ENV_IS_IN_EEPROM
29 /* Define actual evaluation board type from used processor type */
30 #ifdef CONFIG_AT91SAM9G20
31 # define CONFIG_TNY_A9G20
32 # define MACH_TYPE_TNY_A9G20 2059
33 # define CONFIG_MACH_TYPE MACH_TYPE_TNY_A9G20
35 # define CONFIG_TNY_A9260
36 # define MACH_TYPE_TNY_A9260 2058
37 # define CONFIG_MACH_TYPE MACH_TYPE_TNY_A9260
40 /* ARM asynchronous clock */
41 #define CONFIG_SYS_AT91_SLOW_CLOCK 32768 /* slow clock xtal */
42 #define CONFIG_SYS_AT91_MAIN_CLOCK 12000000 /* 12 MHz crystal */
43 #define CONFIG_SYS_HZ 1000
45 #define CONFIG_ARCH_CPU_INIT
46 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
47 #define CONFIG_SETUP_MEMORY_TAGS
48 #define CONFIG_INITRD_TAG
49 #define CONFIG_SKIP_LOWLEVEL_INIT
54 #define CONFIG_ATMEL_LEGACY
55 #define CONFIG_AT91_GPIO
57 #define CONFIG_ATMEL_USART
58 #define CONFIG_USART_BASE ATMEL_BASE_DBGU
59 #define CONFIG_USART_ID ATMEL_ID_SYS
60 #define CONFIG_BAUDRATE 115200
62 #define CONFIG_BOOTDELAY 3
65 * Command line configuration.
67 #include <config_cmd_default.h>
69 #undef CONFIG_CMD_FPGA
71 #undef CONFIG_CMD_IMLS
72 #undef CONFIG_CMD_LOADS
75 #undef CONFIG_CMD_SOURCE
79 #define CONFIG_NR_DRAM_BANKS 1
80 #define CONFIG_SYS_SDRAM_BASE ATMEL_BASE_CS1
81 #define CONFIG_SYS_SDRAM_SIZE 0x04000000 /* 64 megs */
82 # define CONFIG_SYS_INIT_SP_ADDR \
83 (ATMEL_BASE_SRAM1 + 0x1000 - GENERATED_GBL_DATA_SIZE)
87 #define CONFIG_CMD_SPI
88 #define CONFIG_ATMEL_SPI
89 #define CONFIG_SYS_SPI_WRITE_TOUT (5 * CONFIG_SYS_HZ)
91 #define CONFIG_CMD_EEPROM
92 #define CONFIG_SPI_M95XXX
93 #define CONFIG_SYS_EEPROM_SIZE 0x10000
94 #define CONFIG_SYS_EEPROM_PAGE_WRITE_BITS 5
97 #define CONFIG_CMD_NAND
98 #define CONFIG_NAND_ATMEL
99 #define CONFIG_SYS_MAX_NAND_DEVICE 1
100 #define CONFIG_SYS_NAND_BASE ATMEL_BASE_CS3
101 #define CONFIG_SYS_NAND_DBW_8
102 /* our ALE is AD21 */
103 #define CONFIG_SYS_NAND_MASK_ALE (1 << 21)
104 /* our CLE is AD22 */
105 #define CONFIG_SYS_NAND_MASK_CLE (1 << 22)
106 #define CONFIG_SYS_NAND_ENABLE_PIN AT91_PIN_PC14
107 #define CONFIG_SYS_NAND_READY_PIN AT91_PIN_PC13
109 /* NOR flash - no real flash on this board */
110 #define CONFIG_SYS_NO_FLASH
112 #define CONFIG_DOS_PARTITION
113 #define CONFIG_CMD_FAT
115 #define CONFIG_SYS_LOAD_ADDR 0x22000000 /* load address */
117 #define CONFIG_SYS_MEMTEST_START CONFIG_SYS_SDRAM_BASE
118 #define CONFIG_SYS_MEMTEST_END 0x23e00000
120 /* Env in EEPROM, bootstrap + u-boot in NAND*/
121 #ifdef CONFIG_ENV_IS_IN_EEPROM
122 #define CONFIG_ENV_OFFSET 0x20
123 #define CONFIG_ENV_SIZE 0x1000
126 /* Env, bootstrap and u-boot in NAND */
127 #ifdef CONFIG_ENV_IS_IN_NAND
128 #define CONFIG_ENV_OFFSET 0x60000
129 #define CONFIG_ENV_OFFSET_REDUND 0x80000
130 #define CONFIG_ENV_SIZE 0x20000
133 #define CONFIG_BOOTCOMMAND "nboot 0x21000000 0 400000"
134 #define CONFIG_BOOTARGS "console=ttyS0,115200 " \
135 "root=/dev/mtdblock1 " \
136 "mtdparts=atmel_nand:16M(kernel)ro," \
137 "120M(rootfs),-(other) " \
138 "rw rootfstype=jffs2"
140 #define CONFIG_SYS_PROMPT "U-Boot> "
141 #define CONFIG_SYS_CBSIZE 256
142 #define CONFIG_SYS_MAXARGS 16
143 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
144 #define CONFIG_SYS_LONGHELP
145 #define CONFIG_CMDLINE_EDITING
148 * Size of malloc() pool
150 #define CONFIG_SYS_MALLOC_LEN ROUND(3 * CONFIG_ENV_SIZE + 128 * 1024, 0x1000)