3 * Texas Instruments Incorporated.
4 * Aneesh V <aneesh@ti.com>
5 * Steve Sakoman <steve@sakoman.com>
7 * TI OMAP4 common configuration settings
9 * SPDX-License-Identifier: GPL-2.0+
12 #ifndef __CONFIG_TI_OMAP4_COMMON_H
13 #define __CONFIG_TI_OMAP4_COMMON_H
16 * High Level Configuration Options
18 #define CONFIG_OMAP4430 1 /* which is in a 4430 */
19 #define CONFIG_MISC_INIT_R
20 #define CONFIG_ARCH_CPU_INIT
21 #define CONFIG_DISPLAY_CPUINFO 1
22 #define CONFIG_DISPLAY_BOARDINFO 1
24 #define CONFIG_SYS_THUMB_BUILD
26 #ifndef CONFIG_SYS_L2CACHE_OFF
27 #define CONFIG_SYS_L2_PL310 1
28 #define CONFIG_SYS_PL310_BASE 0x48242000
30 #define CONFIG_SYS_CACHELINE_SIZE 32
33 #include <asm/arch/cpu.h>
34 #include <asm/arch/omap.h>
36 /* Use General purpose timer 1 */
37 #define CONFIG_SYS_TIMERBASE GPT2_BASE
40 * Total Size Environment - 128k
42 #define CONFIG_ENV_SIZE (128 << 10)
45 * For the DDR timing information we can either dynamically determine
46 * the timings to use or use pre-determined timings (based on using the
47 * dynamic method. Default to the static timing infomation.
49 #define CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS
50 #ifndef CONFIG_SYS_EMIF_PRECALCULATED_TIMING_REGS
51 #define CONFIG_SYS_AUTOMATIC_SDRAM_DETECTION
52 #define CONFIG_SYS_DEFAULT_LPDDR2_TIMINGS
55 #include <configs/ti_armv7_omap.h>
60 #define CONFIG_SYS_NS16550
61 #define CONFIG_SYS_NS16550_SERIAL
62 #define CONFIG_SYS_NS16550_REG_SIZE (-4)
63 #define CONFIG_SYS_NS16550_CLK 48000000
64 #define CONFIG_CONS_INDEX 3
65 #define CONFIG_SYS_NS16550_COM3 UART3_BASE
68 #ifndef CONFIG_SPL_BUILD
69 #define CONFIG_TWL6030_POWER 1
73 #define CONFIG_MUSB_UDC 1
74 #define CONFIG_USB_OMAP3 1
76 /* USB device configuration */
77 #define CONFIG_USB_DEVICE 1
78 #define CONFIG_USB_TTY 1
79 #define CONFIG_SYS_CONSOLE_IS_IN_ENV 1
84 #define CONFIG_EXTRA_ENV_SETTINGS \
85 DEFAULT_LINUX_BOOT_ENV \
86 "console=ttyO2,115200n8\0" \
87 "fdtfile=undefined\0" \
94 "mmcroot=/dev/mmcblk0p2 rw\0" \
95 "mmcrootfstype=ext3 rootwait\0" \
96 "mmcargs=setenv bootargs console=${console} " \
99 "rootfstype=${mmcrootfstype}\0" \
100 "loadbootscript=load mmc ${mmcdev} ${loadaddr} boot.scr\0" \
101 "bootscript=echo Running bootscript from mmc${mmcdev} ...; " \
102 "source ${loadaddr}\0" \
103 "loadbootenv=load mmc ${mmcdev} ${loadaddr} uEnv.txt\0" \
104 "importbootenv=echo Importing environment from mmc${mmcdev} ...; " \
105 "env import -t ${loadaddr} ${filesize}\0" \
106 "loadimage=load mmc ${bootpart} ${loadaddr} ${bootdir}/${bootfile}\0" \
107 "loaduimage=load mmc ${mmcdev} ${loadaddr} uImage\0" \
108 "mmcboot=echo Booting from mmc${mmcdev} ...; " \
110 "bootz ${loadaddr} - ${fdtaddr}\0" \
111 "uimageboot=echo Booting from mmc${mmcdev} ...; " \
113 "bootm ${loadaddr}\0" \
115 "if test $board_name = sdp4430; then " \
116 "setenv fdtfile omap4-sdp.dtb; fi; " \
117 "if test $board_name = panda; then " \
118 "setenv fdtfile omap4-panda.dtb; fi;" \
119 "if test $board_name = panda-a4; then " \
120 "setenv fdtfile omap4-panda-a4.dtb; fi;" \
121 "if test $board_name = panda-es; then " \
122 "setenv fdtfile omap4-panda-es.dtb; fi;" \
123 "if test $board_name = duovero; then " \
124 "setenv fdtfile omap4-duovero-parlor.dtb; fi;" \
125 "if test $fdtfile = undefined; then " \
126 "echo WARNING: Could not determine device tree to use; fi; \0" \
127 "loadfdt=load mmc ${bootpart} ${fdtaddr} ${bootdir}/${fdtfile}\0" \
129 #define CONFIG_BOOTCOMMAND \
131 "mmc dev ${mmcdev}; if mmc rescan; then " \
132 "echo SD/MMC found on device ${mmcdev};" \
133 "if run loadbootscript; then " \
136 "if run loadbootenv; then " \
137 "run importbootenv; " \
139 "if test -n ${uenvcmd}; then " \
140 "echo Running uenvcmd ...;" \
144 "if run loadimage; then " \
148 "if run loaduimage; then " \
155 * It is known that this will break HS devices. Since the current size of
156 * SPL is overlapped with public stack and breaking non HS devices to boot.
157 * So moving TEXT_BASE down to non-HS limit.
159 #define CONFIG_SPL_TEXT_BASE 0x40300000
160 #define CONFIG_SPL_MAX_SIZE (0x4030C000 - CONFIG_SPL_TEXT_BASE)
161 #define CONFIG_SPL_DISPLAY_PRINT
162 #define CONFIG_SPL_LDSCRIPT "$(CPUDIR)/omap-common/u-boot-spl.lds"
163 #define CONFIG_SYS_SPL_ARGS_ADDR (CONFIG_SYS_SDRAM_BASE + \
167 #define CONFIG_SPL_NAND_AM33XX_BCH /* ELM support */
170 #ifdef CONFIG_SPL_BUILD
171 /* No need for i2c in SPL mode as we will use SRI2C for PMIC access on OMAP4 */
172 #undef CONFIG_SYS_I2C
173 #undef CONFIG_SYS_I2C_OMAP24XX
174 #undef CONFIG_SPL_I2C_SUPPORT
177 #endif /* __CONFIG_TI_OMAP4_COMMON_H */