4 * Copyright (C) 2015 Texas Instruments Incorporated - http://www.ti.com/
6 * SPDX-License-Identifier: GPL-2.0+
8 * The various ARMv7 SoCs from TI all share a number of IP blocks when
9 * implementing a given feature. This is meant to isolate the features
10 * that are based on OMAP architecture.
12 #ifndef __CONFIG_TI_ARMV7_OMAP_H__
13 #define __CONFIG_TI_ARMV7_OMAP_H__
15 /* Common defines for all OMAP architecture based SoCs */
19 #define CONFIG_SYS_OMAP24_I2C_SPEED 100000
20 #define CONFIG_SYS_OMAP24_I2C_SLAVE 1
21 #define CONFIG_SYS_I2C_OMAP24XX
24 #define CONFIG_OMAP_HSMMC
27 #define CONFIG_OMAP3_SPI
30 #define CONFIG_OMAP_GPIO
33 * GPMC NAND block. We support 1 device and the physical address to
34 * access CS0 at is 0x8000000.
37 #define CONFIG_NAND_OMAP_GPMC
38 #ifndef CONFIG_SYS_NAND_BASE
39 #define CONFIG_SYS_NAND_BASE 0x8000000
41 #define CONFIG_SYS_MAX_NAND_DEVICE 1
42 #define CONFIG_CMD_NAND
45 /* Now for the remaining common defines */
46 #include <configs/ti_armv7_common.h>
48 #endif /* __CONFIG_TI_ARMV7_OMAP_H__ */