1 /* SPDX-License-Identifier: GPL-2.0+ */
5 * Copyright (C) 2013 Texas Instruments Incorporated - http://www.ti.com/
7 * The various ARMv7 SoCs from TI all share a number of IP blocks when
8 * implementing a given feature. Rather than define these in every
9 * board or even SoC common file, we define a common file to be re-used
10 * in all cases. While technically true that some of these details are
11 * configurable at the board design, they are common throughout SoC
12 * reference platforms as well as custom designs and become de facto
16 #ifndef __CONFIG_TI_ARMV7_COMMON_H__
17 #define __CONFIG_TI_ARMV7_COMMON_H__
20 * We setup defaults based on constraints from the Linux kernel, which should
21 * also be safe elsewhere. We have the default load at 32MB into DDR (for
22 * the kernel), FDT above 128MB (the maximum location for the end of the
23 * kernel), and the ramdisk 512KB above that (allowing for hopefully never
24 * seen large trees). We say all of this must be within the first 256MB
25 * as that will normally be within the kernel lowmem and thus visible via
26 * bootm_size and we only run on platforms with 256MB or more of memory.
28 * As a temporary storage for DTBO blobs (which should be applied into DTB
29 * blob), we use the location 15.5 MB above the ramdisk. If someone wants to
30 * use ramdisk bigger than 15.5 MB, then DTBO can be loaded and applied to DTB
31 * blob before loading the ramdisk, as DTBO location is only used as a temporary
32 * storage, and can be re-used after 'fdt apply' command is done.
34 #define DEFAULT_LINUX_BOOT_ENV \
35 "loadaddr=0x82000000\0" \
36 "kernel_addr_r=0x82000000\0" \
37 "fdtaddr=0x88000000\0" \
38 "dtboaddr=0x89000000\0" \
39 "fdt_addr_r=0x88000000\0" \
40 "fdtoverlay_addr_r=0x89000000\0" \
41 "rdaddr=0x88080000\0" \
42 "ramdisk_addr_r=0x88080000\0" \
43 "scriptaddr=0x80000000\0" \
44 "pxefile_addr_r=0x80100000\0" \
45 "bootm_size=0x10000000\0" \
48 #define DEFAULT_FIT_TI_ARGS \
50 "addr_fit=0x90000000\0" \
51 "name_fit=fitImage\0" \
52 "update_to_fit=setenv loadaddr ${addr_fit}; setenv bootfile ${name_fit}\0" \
53 "get_overlaystring=" \
54 "for overlay in $name_overlays;" \
56 "setenv overlaystring ${overlaystring}'#'${overlay};" \
58 "run_fit=bootm ${addr_fit}#conf-${fdtfile}${overlaystring}\0" \
61 * DDR information. If the CONFIG_NR_DRAM_BANKS is not defined,
62 * we say (for simplicity) that we have 1 bank, always, even when
63 * we have more. We always start at 0x80000000, and we place the
64 * initial stack pointer in our SRAM. Otherwise, we can define
65 * CONFIG_NR_DRAM_BANKS before including this file.
67 #define CONFIG_SYS_SDRAM_BASE 0x80000000
69 #ifndef CONFIG_SYS_INIT_SP_ADDR
70 #define CONFIG_SYS_INIT_SP_ADDR (NON_SECURE_SRAM_END - \
71 GENERATED_GBL_DATA_SIZE)
74 /* If DM_I2C, enable non-DM I2C support */
77 * The following are general good-enough settings for U-Boot. We set a
78 * large malloc pool as we generally have a lot of DDR, and we opt for
79 * function over binary size in the main portion of U-Boot as this is
80 * generally easily constrained later if needed. We enable the config
81 * options that give us information in the environment about what board
82 * we are on so we do not need to rely on the command prompt. We set a
83 * console baudrate of 115200 and use the default baud rate table.
86 /* As stated above, the following choices are optional. */
88 /* Console I/O Buffer Size */
90 * When we have SPI, NOR or NAND flash we expect to be making use of
91 * mtdparts, both for ease of use in U-Boot and for passing information
92 * on to the Linux kernel.
96 * Our platforms make use of SPL to initalize the hardware (primarily
97 * memory) enough for full U-Boot to be loaded. We make use of the general
98 * SPL framework found under common/spl/. Given our generally common memory
99 * map, we set a number of related defaults and sizes here.
101 #if !defined(CONFIG_NOR_BOOT) && \
102 !(defined(CONFIG_QSPI_BOOT) && defined(CONFIG_AM43XX))
105 * We also support Falcon Mode so that the Linux kernel can be booted
106 * directly from SPL. This is not currently available on HS devices.
110 * Place the image at the start of the ROM defined image space (per
111 * CONFIG_SPL_TEXT_BASE and we limit our size to the ROM-defined
112 * downloaded image area minus 1KiB for scratch space. We initalize DRAM as
113 * soon as we can so that we can place stack, malloc and BSS there. We load
114 * U-Boot itself into memory at 0x80800000 for legacy reasons (to not conflict
115 * with older SPLs). We have our BSS be placed 2MiB after this, to allow for
116 * the default Linux kernel address of 0x80008000 to work with most sized
117 * kernels, in the Falcon Mode case. We have the SPL malloc pool at the end
118 * of the BSS area. We suggest that the stack be placed at 32MiB after the
119 * start of DRAM to allow room for all of the above (handled in Kconfig).
121 #ifndef CONFIG_SPL_BSS_START_ADDR
122 #define CONFIG_SPL_BSS_START_ADDR 0x80a00000
124 #ifndef CONFIG_SYS_SPL_MALLOC_START
125 #define CONFIG_SYS_SPL_MALLOC_START (CONFIG_SPL_BSS_START_ADDR + \
126 CONFIG_SPL_BSS_MAX_SIZE)
127 #define CONFIG_SYS_SPL_MALLOC_SIZE SZ_8M
130 #ifdef CONFIG_SPL_OS_BOOT
133 /* RAW SD card / eMMC */
134 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR 0x1500 /* address 0x2A0000 */
135 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS 0x200 /* 256KiB */
138 /* General parts of the framework, required. */
140 #ifdef CONFIG_MTD_RAW_NAND
141 #define CONFIG_SYS_NAND_U_BOOT_START CONFIG_SYS_TEXT_BASE
143 #endif /* !CONFIG_NOR_BOOT */
145 /* Generic Environment Variables */
147 #ifdef CONFIG_CMD_NET
149 "static_ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}:${hostname}" \
152 "rootpath=/export/rootfs\0" \
153 "netloadimage=tftp ${loadaddr} ${bootfile}\0" \
154 "netloadfdt=tftp ${fdtaddr} ${fdtfile}\0" \
155 "netargs=setenv bootargs console=${console} " \
158 "nfsroot=${serverip}:${rootpath},${nfsopts} rw " \
160 "netboot=echo Booting from network ...; " \
161 "setenv autoload no; " \
163 "run netloadimage; " \
166 "bootz ${loadaddr} - ${fdtaddr}\0"
171 #endif /* __CONFIG_TI_ARMV7_COMMON_H__ */