include/configs/thunderx_88xx.h

   1 /* SPDX-License-Identifier: GPL-2.0+ */
   2 /**
   3  * (C) Copyright 2014, Cavium Inc.
   4 **/
   5
   6 #ifndef __THUNDERX_88XX_H__
   7 #define __THUNDERX_88XX_H__
   8
   9 #define MEM_BASE                        0x00500000
  10
  11 #define CFG_SYS_LOWMEM_BASE             MEM_BASE
  12
  13 /* Link Definitions */
  14
  15 /* SMP Spin Table Definitions */
  16 #define CPU_RELEASE_ADDR                (CFG_SYS_SDRAM_BASE + 0x7fff0)
  17
  18 /* PL011 Serial Configuration */
  19
  20 #define CFG_PL011_CLOCK         24000000
  21
  22 /* Generic Interrupt Controller Definitions */
  23 #define GICD_BASE                       (0x801000000000)
  24 #define GICR_BASE                       (0x801000002000)
  25 #define CFG_SYS_SERIAL0         0x87e024000000
  26 #define CFG_SYS_SERIAL1         0x87e025000000
  27
  28 /* Miscellaneous configurable options */
  29
  30 /* Physical Memory Map */
  31 #define PHYS_SDRAM_1                    (MEM_BASE)        /* SDRAM Bank #1 */
  32 #define PHYS_SDRAM_1_SIZE               (0x80000000-MEM_BASE)   /* 2048 MB */
  33 #define CFG_SYS_SDRAM_BASE              PHYS_SDRAM_1
  34
  35 /* Initial environment variables */
  36 #define UBOOT_IMG_HEAD_SIZE             0x40
  37 /* C80000 - 0x40 */
  38 #define CFG_EXTRA_ENV_SETTINGS  \
  39                                         "kernel_addr=08007ffc0\0"       \
  40                                         "fdt_addr=0x94C00000\0"         \
  41                                         "fdt_high=0x9fffffff\0"
  42
  43 /* Do not preserve environment */
  44
  45 #define PLL_REF_CLK                     50000000        /* 50 MHz */
  46 #define NS_PER_REF_CLK_TICK             (1000000000/PLL_REF_CLK)
  47
  48 #endif /* __THUNDERX_88XX_H__ */