2 * Copyright 2013-2016, NVIDIA CORPORATION.
4 * SPDX-License-Identifier: GPL-2.0
7 #ifndef _TEGRA186_COMMON_H_
8 #define _TEGRA186_COMMON_H_
10 #include "tegra-common.h"
13 * NS16550 Configuration
15 #define V_NS16550_CLK 408000000 /* 408MHz (pllp_out0) */
17 /*-----------------------------------------------------------------------
21 #define CONFIG_SYS_TEXT_BASE 0x80080000
23 /* Generic Interrupt Controller */
27 * Memory layout for where various images get loaded by boot scripts:
29 * scriptaddr can be pretty much anywhere that doesn't conflict with something
30 * else. Put it above BOOTMAPSZ to eliminate conflicts.
32 * pxefile_addr_r can be pretty much anywhere that doesn't conflict with
33 * something else. Put it above BOOTMAPSZ to eliminate conflicts.
35 * kernel_addr_r must be within the first 128M of RAM in order for the
36 * kernel's CONFIG_AUTO_ZRELADDR option to work. Since the kernel will
37 * decompress itself to 0x8000 after the start of RAM, kernel_addr_r
38 * should not overlap that area, or the kernel will have to copy itself
39 * somewhere else before decompression. Similarly, the address of any other
40 * data passed to the kernel shouldn't overlap the start of RAM. Pushing
41 * this up to 16M allows for a sizable kernel to be decompressed below the
42 * compressed load address.
44 * fdt_addr_r simply shouldn't overlap anything else. Choosing 32M allows for
45 * the compressed kernel to be up to 16M too.
47 * ramdisk_addr_r simply shouldn't overlap anything else. Choosing 33M allows
48 * for the FDT/DTB to be up to 1M, which is hopefully plenty.
50 #define CONFIG_LOADADDR 0x80080000
51 #define MEM_LAYOUT_ENV_SETTINGS \
52 "scriptaddr=0x90000000\0" \
53 "pxefile_addr_r=0x90100000\0" \
54 "kernel_addr_r=" __stringify(CONFIG_LOADADDR) "\0" \
55 "fdt_addr_r=0x82000000\0" \
56 "ramdisk_addr_r=0x82100000\0"