2 * (C) Copyright 2010-2012
3 * NVIDIA Corporation <www.nvidia.com>
5 * SPDX-License-Identifier: GPL-2.0+
8 #ifndef _TEGRA_COMMON_H_
9 #define _TEGRA_COMMON_H_
10 #include <linux/sizes.h>
11 #include <linux/stringify.h>
14 * High Level Configuration Options
16 #define CONFIG_ARMCORTEXA9 /* This is an ARM V7 CPU core */
17 #define CONFIG_SYS_L2CACHE_OFF /* No L2 cache */
19 #include <asm/arch/tegra.h> /* get chip and board defs */
21 /* Use the Tegra US timer on ARMv7, but the architected timer on ARMv8. */
23 #define CONFIG_SYS_TIMER_RATE 1000000
24 #define CONFIG_SYS_TIMER_COUNTER NV_PA_TMRUS_BASE
28 * Display CPU and Board information
30 #define CONFIG_DISPLAY_CPUINFO
31 #define CONFIG_DISPLAY_BOARDINFO
33 #define CONFIG_CMDLINE_TAG /* enable passing of ATAGs */
36 #define CONFIG_ENV_VARS_UBOOT_CONFIG
37 #define CONFIG_ENV_SIZE 0x2000 /* Total Size Environment */
40 * NS16550 Configuration
42 #define CONFIG_TEGRA_SERIAL
43 #define CONFIG_SYS_NS16550
46 * Common HW configuration.
47 * If this varies between SoCs later, move to tegraNN-common.h
48 * Note: This is number of devices, not max device ID.
50 #define CONFIG_SYS_MMC_MAX_DEVICE 4
53 * select serial console configuration
55 #define CONFIG_CONS_INDEX 1
57 /* allow to overwrite serial and ethaddr */
58 #define CONFIG_ENV_OVERWRITE
59 #define CONFIG_BAUDRATE 115200
61 /* turn on command-line edit/hist/auto */
62 #define CONFIG_COMMAND_HISTORY
64 /* turn on commonly used storage-related commands */
65 #define CONFIG_PARTITION_UUIDS
66 #define CONFIG_CMD_PART
68 #define CONFIG_SYS_NO_FLASH
70 #define CONFIG_CONSOLE_MUX
71 #define CONFIG_SYS_CONSOLE_IS_IN_ENV
72 #ifndef CONFIG_SPL_BUILD
73 #define CONFIG_SYS_STDIO_DEREGISTER
77 * Increasing the size of the IO buffer as default nfsargs size is more
78 * than 256 and so it is not possible to edit it
80 #define CONFIG_SYS_CBSIZE (256 * 2) /* Console I/O Buffer Size */
81 /* Print Buffer Size */
82 #define CONFIG_SYS_PBSIZE (CONFIG_SYS_CBSIZE + \
83 sizeof(CONFIG_SYS_PROMPT) + 16)
84 #define CONFIG_SYS_MAXARGS 32 /* max number of command args */
85 /* Boot Argument Buffer Size */
86 #define CONFIG_SYS_BARGSIZE (CONFIG_SYS_CBSIZE)
88 #define CONFIG_SYS_MEMTEST_START (NV_PA_SDRC_CS0 + 0x600000)
89 #define CONFIG_SYS_MEMTEST_END (CONFIG_SYS_MEMTEST_START + 0x100000)
92 #ifndef CONFIG_SPL_BUILD
93 #define CONFIG_USE_ARCH_MEMCPY
97 /*-----------------------------------------------------------------------
100 #define CONFIG_NR_DRAM_BANKS 2
101 #define PHYS_SDRAM_1 NV_PA_SDRC_CS0
102 #define PHYS_SDRAM_1_SIZE 0x20000000 /* 512M */
104 #define CONFIG_SYS_UBOOT_START CONFIG_SYS_TEXT_BASE
105 #define CONFIG_SYS_SDRAM_BASE PHYS_SDRAM_1
107 #define CONFIG_SYS_BOOTMAPSZ (256 << 20) /* 256M */
109 #define CONFIG_SYS_INIT_RAM_ADDR CONFIG_STACKBASE
110 #define CONFIG_SYS_INIT_RAM_SIZE CONFIG_SYS_MALLOC_LEN
111 #define CONFIG_SYS_INIT_SP_ADDR (CONFIG_SYS_INIT_RAM_ADDR + \
112 CONFIG_SYS_INIT_RAM_SIZE - \
113 GENERATED_GBL_DATA_SIZE)
115 #define CONFIG_TEGRA_GPIO
116 #define CONFIG_CMD_ENTERRCM
118 /* Defines for SPL */
119 #define CONFIG_SPL_FRAMEWORK
120 #define CONFIG_SPL_RAM_DEVICE
121 #define CONFIG_SPL_BOARD_INIT
122 #define CONFIG_SPL_NAND_SIMPLE
123 #define CONFIG_SPL_MAX_FOOTPRINT (CONFIG_SYS_TEXT_BASE - \
124 CONFIG_SPL_TEXT_BASE)
125 #define CONFIG_SYS_SPL_MALLOC_SIZE 0x00010000
127 #define CONFIG_SPL_LIBCOMMON_SUPPORT
128 #define CONFIG_SPL_LIBGENERIC_SUPPORT
129 #define CONFIG_SPL_SERIAL_SUPPORT
130 #define CONFIG_SPL_GPIO_SUPPORT
132 #define CONFIG_BOARD_EARLY_INIT_F
133 #define CONFIG_BOARD_LATE_INIT
135 /* Misc utility code */
136 #define CONFIG_BOUNCE_BUFFER
137 #define CONFIG_CRC32_VERIFY
139 #ifndef CONFIG_SPL_BUILD
140 #include <config_distro_defaults.h>
141 #define CONFIG_CMD_EXT4_WRITE
142 #define CONFIG_FAT_WRITE
145 #define CONFIG_OF_SYSTEM_SETUP
147 #endif /* _TEGRA_COMMON_H_ */